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arm64: dts: uniphier: use clock/reset controllers
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The UniPhier reset controller driver has been merged.  Enable it.
Also, replace the fixed-rate clocks with the dedicated clock
drivers.

Signed-off-by: Masahiro Yamada <[email protected]>
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masahir0y committed Aug 30, 2016
1 parent 5d9a83c commit 42aee27
Showing 1 changed file with 58 additions and 22 deletions.
80 changes: 58 additions & 22 deletions arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -114,18 +114,6 @@
#clock-cells = <0>;
clock-frequency = <25000000>;
};

uart_clk: uart_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <58820000>;
};

i2c_clk: i2c_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <50000000>;
};
};

timer {
Expand All @@ -149,7 +137,7 @@
interrupts = <0 33 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart0>;
clocks = <&uart_clk>;
clocks = <&peri_clk 0>;
};

serial1: serial@54006900 {
Expand All @@ -159,7 +147,7 @@
interrupts = <0 35 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
clocks = <&uart_clk>;
clocks = <&peri_clk 1>;
};

serial2: serial@54006a00 {
Expand All @@ -169,7 +157,7 @@
interrupts = <0 37 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
clocks = <&uart_clk>;
clocks = <&peri_clk 2>;
};

serial3: serial@54006b00 {
Expand All @@ -179,7 +167,7 @@
interrupts = <0 177 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
clocks = <&uart_clk>;
clocks = <&peri_clk 3>;
};

i2c0: i2c@58780000 {
Expand All @@ -191,7 +179,7 @@
interrupts = <0 41 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c0>;
clocks = <&i2c_clk>;
clocks = <&peri_clk 4>;
clock-frequency = <100000>;
};

Expand All @@ -204,7 +192,7 @@
interrupts = <0 42 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
clocks = <&i2c_clk>;
clocks = <&peri_clk 5>;
clock-frequency = <100000>;
};

Expand All @@ -214,7 +202,7 @@
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 43 4>;
clocks = <&i2c_clk>;
clocks = <&peri_clk 6>;
clock-frequency = <400000>;
};

Expand All @@ -227,7 +215,7 @@
interrupts = <0 44 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
clocks = <&i2c_clk>;
clocks = <&peri_clk 7>;
clock-frequency = <100000>;
};

Expand All @@ -240,7 +228,7 @@
interrupts = <0 45 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c4>;
clocks = <&i2c_clk>;
clocks = <&peri_clk 8>;
clock-frequency = <100000>;
};

Expand All @@ -250,7 +238,7 @@
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 25 4>;
clocks = <&i2c_clk>;
clocks = <&peri_clk 9>;
clock-frequency = <400000>;
};

Expand All @@ -269,6 +257,38 @@
reg = <0x59801000 0x400>;
};

mioctrl@59810000 {
compatible = "socionext,uniphier-mioctrl",
"simple-mfd", "syscon";
reg = <0x59810000 0x800>;

mio_clk: clock {
compatible = "socionext,uniphier-ld20-mio-clock";
#clock-cells = <1>;
};

mio_rst: reset {
compatible = "socionext,uniphier-ld20-mio-reset";
#reset-cells = <1>;
};
};

perictrl@59820000 {
compatible = "socionext,uniphier-perictrl",
"simple-mfd", "syscon";
reg = <0x59820000 0x200>;

peri_clk: clock {
compatible = "socionext,uniphier-ld20-peri-clock";
#clock-cells = <1>;
};

peri_rst: reset {
compatible = "socionext,uniphier-ld20-peri-reset";
#reset-cells = <1>;
};
};

soc-glue@5f800000 {
compatible = "simple-mfd", "syscon";
reg = <0x5f800000 0x2000>;
Expand All @@ -286,6 +306,22 @@
#interrupt-cells = <3>;
interrupts = <1 9 4>;
};

sysctrl@61840000 {
compatible = "socionext,uniphier-sysctrl",
"simple-mfd", "syscon";
reg = <0x61840000 0x4000>;

sys_clk: clock {
compatible = "socionext,uniphier-ld20-clock";
#clock-cells = <1>;
};

sys_rst: reset {
compatible = "socionext,uniphier-ld20-reset";
#reset-cells = <1>;
};
};
};
};

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