m68knommu: Fixed GPIO pin initialization for CONFIG_M5271 FEC.

This processor only have one FEC and its MDIO pins are located at a different offset than the code used for the current CONFIG_M527x. Tesed on M5271EVB eval platform. Without this patch the FEC driver will report no PHY attached if the bootloader does not pre-initialize the PAR_FECI2C GPIO register. Signed-off-by: Richard Retanubun <[email protected]> Signed-off-by: Greg Ungerer <[email protected]>
jledet · Apr 22, 2009 · 592578a · 592578a
1 parent ccc5ff9
commit 592578a
Showing 1 changed file with 5 additions and 0 deletions.
diff --git a/arch/m68knommu/platform/527x/config.c b/arch/m68knommu/platform/527x/config.c
@@ -189,10 +189,15 @@ static void __init m527x_fec_init(void)
 	m527x_fec_irq_init(0);
 
 	/* Set multi-function pins to ethernet mode for fec0 */
+#if defined(CONFIG_M5271)
+	v = readb(MCF_IPSBAR + 0x100047);
+	writeb(v | 0xf0, MCF_IPSBAR + 0x100047);
+#else
 	par = readw(MCF_IPSBAR + 0x100082);
 	writew(par | 0xf00, MCF_IPSBAR + 0x100082);
 	v = readb(MCF_IPSBAR + 0x100078);
 	writeb(v | 0xc0, MCF_IPSBAR + 0x100078);
+#endif
 
 #ifdef CONFIG_FEC2
 	m527x_fec_irq_init(1);