MIPS: Tidy EntryLo bit definitions, add PFN

Tidy up the definition of the EntryLo RI & XI bits using BITS_PER_LONG rather than #ifdef'ing on CONFIG_64BIT, and add a definition for the offset to the PFN field for use by a later patch. Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Cc: Steven J. Hill <[email protected]> Cc: Maciej W. Rozycki <[email protected]> Cc: [email protected] Cc: James Hogan <[email protected]> Cc: Markos Chandras <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/11217/ Signed-off-by: Ralf Baechle <[email protected]>
jljusten · Nov 11, 2015 · c695672 · c695672
1 parent c676589
commit c695672
Showing 1 changed file with 3 additions and 9 deletions.
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
@@ -132,15 +132,9 @@
 #define R3K_ENTRYLO_N		(_ULCAST_(1) << 11)
 
 /* MIPS32/64 EntryLo bit definitions */
-#ifdef CONFIG_64BIT
-/* as read by dmfc0 */
-#define MIPS_ENTRYLO_XI		(_ULCAST_(1) << 62)
-#define MIPS_ENTRYLO_RI		(_ULCAST_(1) << 63)
-#else
-/* as read by mfc0 */
-#define MIPS_ENTRYLO_XI		(_ULCAST_(1) << 30)
-#define MIPS_ENTRYLO_RI		(_ULCAST_(1) << 31)
-#endif
+#define MIPS_ENTRYLO_PFN_SHIFT	6
+#define MIPS_ENTRYLO_XI		(_ULCAST_(1) << (BITS_PER_LONG - 2))
+#define MIPS_ENTRYLO_RI		(_ULCAST_(1) << (BITS_PER_LONG - 1))
 
 /*
  * Values for PageMask register