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iommu/core: split mapping to page sizes as supported by the hardware
When mapping a memory region, split it to page sizes as supported by the iommu hardware. Always prefer bigger pages, when possible, in order to reduce the TLB pressure. The logic to do that is now added to the IOMMU core, so neither the iommu drivers themselves nor users of the IOMMU API have to duplicate it. This allows a more lenient granularity of mappings; traditionally the IOMMU API took 'order' (of a page) as a mapping size, and directly let the low level iommu drivers handle the mapping, but now that the IOMMU core can split arbitrary memory regions into pages, we can remove this limitation, so users don't have to split those regions by themselves. Currently the supported page sizes are advertised once and they then remain static. That works well for OMAP and MSM but it would probably not fly well with intel's hardware, where the page size capabilities seem to have the potential to be different between several DMA remapping devices. register_iommu() currently sets a default pgsize behavior, so we can convert the IOMMU drivers in subsequent patches. After all the drivers are converted, the temporary default settings will be removed. Mainline users of the IOMMU API (kvm and omap-iovmm) are adopted to deal with bytes instead of page order. Many thanks to Joerg Roedel <[email protected]> for significant review! Signed-off-by: Ohad Ben-Cohen <[email protected]> Cc: David Brown <[email protected]> Cc: David Woodhouse <[email protected]> Cc: Joerg Roedel <[email protected]> Cc: Stepan Moskovchenko <[email protected]> Cc: KyongHo Cho <[email protected]> Cc: Hiroshi DOYU <[email protected]> Cc: Laurent Pinchart <[email protected]> Cc: [email protected] Signed-off-by: Joerg Roedel <[email protected]>
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