Fix set call that Aldec simulator considers ambiguous

examples/vhdl/array/src/test/tb_sobel_x.vhd

@@ -48,7 +48,7 @@ begin
 
       for y in 0 to image.height-1 loop
         for x in 0 to image.width-1 loop
-          result.set(x, y,
+          result.set(x => x, y => y,
                      value => (image.get(minimum(x+1, image.width-1),y) -
                                image.get(maximum(x-1, 0), y)));
         end loop;

vhdl/array/test/tb_array.vhd

@@ -2,7 +2,7 @@
 -- License, v. 2.0. If a copy of the MPL was not distributed with this file,
 -- You can obtain one at http://mozilla.org/MPL/2.0/.
 --
--- Copyright (c) 2014, Lars Asplund [email protected]
+-- Copyright (c) 2014-2015, Lars Asplund [email protected]
 
 -- @TODO add explicit check of csv string data
 use std.textio.all;
@@ -112,8 +112,8 @@ begin
 
       elsif run("Has set 2d") then
         arr.init_2d(width => 1, height => 2);
-        arr.set(0, 0, value => 7);
-        arr.set(0, 1, value => 11);
+        arr.set(x => 0, y => 0, value => 7);
+        arr.set(x => 0, y => 1, value => 11);
 
       elsif run("Test reshape") then
         arr.init(length => 1);