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Merge branch 'for-linus' of git://git.linaro.org/people/rmk/linux-arm
Pull ARM updates from Russell King: "This is the first chunk of ARM updates for this merge window. Conflicts are expected in two files - asm/timex.h and mach-integrator/integrator_cp.c. Nothing particularly stands out more than anything else. Most of the growth is down to the opcodes stuff from Dave Martin, which is countered by Rob's patches to use more of the asm-generic headers on ARM." (A few more conflicts grew since then, but it all looked fairly trivial) * 'for-linus' of git://git.linaro.org/people/rmk/linux-arm: (44 commits) ARM: 7548/1: include linux/sched.h in syscall.h ARM: 7541/1: Add ARM ERRATA 775420 workaround ARM: ensure vm_struct has its phys_addr member filled in ARM: 7540/1: kexec: Check segment memory addresses ARM: 7539/1: kexec: scan for dtb magic in segments ARM: 7538/1: delay: add registration mechanism for delay timer sources ARM: 7536/1: smp: Formalize an IPI for wakeup ARM: 7525/1: ptrace: use updated syscall number for syscall auditing ARM: 7524/1: support syscall tracing ARM: 7519/1: integrator: convert platform devices to Device Tree ARM: 7518/1: integrator: convert AMBA devices to device tree ARM: 7517/1: integrator: initial device tree support ARM: 7516/1: plat-versatile: add DT support to FPGA IRQ ARM: 7515/1: integrator: check PL010 base address from resource ARM: 7514/1: integrator: call common init function from machine ARM: 7522/1: arch_timers: register a time/cycle counter ARM: 7523/1: arch_timers: enable the use of the virtual timer ARM: 7531/1: mark kernelmode mem{cpy,set} non-experimental ARM: 7520/1: Build dtb files in all target ARM: Fix build warning in arch/arm/mm/alignment.c ...
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Documentation/devicetree/bindings/arm/versatile-fpga-irq.txt
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* ARM Versatile FPGA interrupt controller | ||
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One or more FPGA IRQ controllers can be synthesized in an ARM reference board | ||
such as the Integrator or Versatile family. The output of these different | ||
controllers are OR:ed together and fed to the CPU tile's IRQ input. Each | ||
instance can handle up to 32 interrupts. | ||
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Required properties: | ||
- compatible: "arm,versatile-fpga-irq" | ||
- interrupt-controller: Identifies the node as an interrupt controller | ||
- #interrupt-cells: The number of cells to define the interrupts. Must be 1 | ||
as the FPGA IRQ controller has no configuration options for interrupt | ||
sources. The cell is a u32 and defines the interrupt number. | ||
- reg: The register bank for the FPGA interrupt controller. | ||
- clear-mask: a u32 number representing the mask written to clear all IRQs | ||
on the controller at boot for example. | ||
- valid-mask: a u32 number representing a bit mask determining which of | ||
the interrupts are valid. Unconnected/unused lines are set to 0, and | ||
the system till not make it possible for devices to request these | ||
interrupts. | ||
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Example: | ||
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pic: pic@14000000 { | ||
compatible = "arm,versatile-fpga-irq"; | ||
#interrupt-cells = <1>; | ||
interrupt-controller; | ||
reg = <0x14000000 0x100>; | ||
clear-mask = <0xffffffff>; | ||
valid-mask = <0x003fffff>; | ||
}; |
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/* | ||
* SoC core Device Tree for the ARM Integrator platforms | ||
*/ | ||
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/include/ "skeleton.dtsi" | ||
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/ { | ||
timer@13000000 { | ||
reg = <0x13000000 0x100>; | ||
interrupt-parent = <&pic>; | ||
interrupts = <5>; | ||
}; | ||
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timer@13000100 { | ||
reg = <0x13000100 0x100>; | ||
interrupt-parent = <&pic>; | ||
interrupts = <6>; | ||
}; | ||
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timer@13000200 { | ||
reg = <0x13000200 0x100>; | ||
interrupt-parent = <&pic>; | ||
interrupts = <7>; | ||
}; | ||
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pic@14000000 { | ||
compatible = "arm,versatile-fpga-irq"; | ||
#interrupt-cells = <1>; | ||
interrupt-controller; | ||
reg = <0x14000000 0x100>; | ||
clear-mask = <0xffffffff>; | ||
}; | ||
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flash@24000000 { | ||
compatible = "cfi-flash"; | ||
reg = <0x24000000 0x02000000>; | ||
}; | ||
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fpga { | ||
compatible = "arm,amba-bus", "simple-bus"; | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
ranges; | ||
interrupt-parent = <&pic>; | ||
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/* | ||
* These PrimeCells are in the same locations and using the | ||
* same interrupts in all Integrators, however the silicon | ||
* version deployed is different. | ||
*/ | ||
rtc@15000000 { | ||
reg = <0x15000000 0x1000>; | ||
interrupts = <8>; | ||
}; | ||
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uart@16000000 { | ||
reg = <0x16000000 0x1000>; | ||
interrupts = <1>; | ||
}; | ||
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uart@17000000 { | ||
reg = <0x17000000 0x1000>; | ||
interrupts = <2>; | ||
}; | ||
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kmi@18000000 { | ||
reg = <0x18000000 0x1000>; | ||
interrupts = <3>; | ||
}; | ||
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kmi@19000000 { | ||
reg = <0x19000000 0x1000>; | ||
interrupts = <4>; | ||
}; | ||
}; | ||
}; |
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/* | ||
* Device Tree for the ARM Integrator/AP platform | ||
*/ | ||
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/dts-v1/; | ||
/include/ "integrator.dtsi" | ||
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/ { | ||
model = "ARM Integrator/AP"; | ||
compatible = "arm,integrator-ap"; | ||
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aliases { | ||
arm,timer-primary = &timer2; | ||
arm,timer-secondary = &timer1; | ||
}; | ||
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chosen { | ||
bootargs = "root=/dev/ram0 console=ttyAM0,38400n8 earlyprintk"; | ||
}; | ||
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timer0: timer@13000000 { | ||
compatible = "arm,integrator-timer"; | ||
}; | ||
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timer1: timer@13000100 { | ||
compatible = "arm,integrator-timer"; | ||
}; | ||
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timer2: timer@13000200 { | ||
compatible = "arm,integrator-timer"; | ||
}; | ||
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pic: pic@14000000 { | ||
valid-mask = <0x003fffff>; | ||
}; | ||
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fpga { | ||
/* | ||
* The Integator/AP predates the idea to have magic numbers | ||
* identifying the PrimeCell in hardware, thus we have to | ||
* supply these from the device tree. | ||
*/ | ||
rtc: rtc@15000000 { | ||
compatible = "arm,pl030", "arm,primecell"; | ||
arm,primecell-periphid = <0x00041030>; | ||
}; | ||
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uart0: uart@16000000 { | ||
compatible = "arm,pl010", "arm,primecell"; | ||
arm,primecell-periphid = <0x00041010>; | ||
}; | ||
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uart1: uart@17000000 { | ||
compatible = "arm,pl010", "arm,primecell"; | ||
arm,primecell-periphid = <0x00041010>; | ||
}; | ||
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kmi0: kmi@18000000 { | ||
compatible = "arm,pl050", "arm,primecell"; | ||
arm,primecell-periphid = <0x00041050>; | ||
}; | ||
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kmi1: kmi@19000000 { | ||
compatible = "arm,pl050", "arm,primecell"; | ||
arm,primecell-periphid = <0x00041050>; | ||
}; | ||
}; | ||
}; |
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