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ARM: dts: imx6sl: use tabs for code indent
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This fixes the following error:

arch/arm/boot/dts/imx6sl.dtsi:714: error: code indent should use tabs
where possible

Signed-off-by: Marcel Ziswiler <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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ziswiler authored and Shawn Guo committed Sep 5, 2022
1 parent 415432c commit 218db82
Showing 1 changed file with 10 additions and 10 deletions.
20 changes: 10 additions & 10 deletions arch/arm/boot/dts/imx6sl.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -61,10 +61,10 @@
<792000 1175000>,
<396000 975000>;
fsl,soc-operating-points =
/* ARM kHz SOC-PU uV */
<996000 1225000>,
<792000 1175000>,
<396000 1175000>;
/* ARM kHz SOC-PU uV */
<996000 1225000>,
<792000 1175000>,
<396000 1175000>;
clock-latency = <61036>; /* two CLK32 periods */
#cooling-cells = <2>;
clocks = <&clks IMX6SL_CLK_ARM>, <&clks IMX6SL_CLK_PLL2_PFD2>,
Expand Down Expand Up @@ -225,7 +225,7 @@

uart5: serial@2018000 {
compatible = "fsl,imx6sl-uart",
"fsl,imx6q-uart", "fsl,imx21-uart";
"fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x02018000 0x4000>;
interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SL_CLK_UART>,
Expand All @@ -238,7 +238,7 @@

uart1: serial@2020000 {
compatible = "fsl,imx6sl-uart",
"fsl,imx6q-uart", "fsl,imx21-uart";
"fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x02020000 0x4000>;
interrupts = <0 26 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SL_CLK_UART>,
Expand All @@ -251,7 +251,7 @@

uart2: serial@2024000 {
compatible = "fsl,imx6sl-uart",
"fsl,imx6q-uart", "fsl,imx21-uart";
"fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x02024000 0x4000>;
interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SL_CLK_UART>,
Expand Down Expand Up @@ -312,7 +312,7 @@

uart3: serial@2034000 {
compatible = "fsl,imx6sl-uart",
"fsl,imx6q-uart", "fsl,imx21-uart";
"fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x02034000 0x4000>;
interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SL_CLK_UART>,
Expand All @@ -325,7 +325,7 @@

uart4: serial@2038000 {
compatible = "fsl,imx6sl-uart",
"fsl,imx6q-uart", "fsl,imx21-uart";
"fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x02038000 0x4000>;
interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SL_CLK_UART>,
Expand Down Expand Up @@ -714,7 +714,7 @@
#power-domain-cells = <0>;
power-supply = <&reg_pu>;
clocks = <&clks IMX6SL_CLK_GPU2D_OVG>,
<&clks IMX6SL_CLK_GPU2D_PODF>;
<&clks IMX6SL_CLK_GPU2D_PODF>;
};

pd_disp: power-domain@2 {
Expand Down

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