Documentation: fpga: dfl: add link address of feature id table

This patch adds the link address of feature id table in documentation. Signed-off-by: Tianfei zhang <[email protected]> Reviewed-by: Matthew Gerlach <[email protected]> Acked-by: Moritz Fischer <[email protected]> Acked-by: Wu Hao <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Xu Yilun <[email protected]>
josf · May 10, 2022 · 2b28c9e · 2b28c9e
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diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst
@@ -502,6 +502,11 @@ Developer only needs to provide a sub feature driver with matched feature id.
 FME Partial Reconfiguration Sub Feature driver (see drivers/fpga/dfl-fme-pr.c)
 could be a reference.
 
+Please refer to below link to existing feature id table and guide for new feature
+ids application.
+https://github.com/OPAE/dfl-feature-id
+
+
 Location of DFLs on a PCI Device
 ================================
 The original method for finding a DFL on a PCI device assumed the start of the