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Merge tag 'pinctrl-v5.13-3' of git://git.kernel.org/pub/scm/linux/ker…
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…nel/git/linusw/linux-pinctrl

Pull pin control fixes from Linus Walleij:
 "Two last-minute fixes:

   - Put an fwnode in the errorpath in the SGPIO driver

   - Fix the number of GPIO lines per bank in the STM32 driver"

* tag 'pinctrl-v5.13-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
  pinctrl: stm32: fix the reported number of GPIO lines per bank
  pinctrl: microchip-sgpio: Put fwnode in error case during ->probe()
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torvalds committed Jun 26, 2021
2 parents e2f527b + 67e2996 commit b7050b2
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Showing 2 changed files with 10 additions and 3 deletions.
4 changes: 3 additions & 1 deletion drivers/pinctrl/pinctrl-microchip-sgpio.c
Original file line number Diff line number Diff line change
Expand Up @@ -845,8 +845,10 @@ static int microchip_sgpio_probe(struct platform_device *pdev)
i = 0;
device_for_each_child_node(dev, fwnode) {
ret = microchip_sgpio_register_bank(dev, priv, fwnode, i++);
if (ret)
if (ret) {
fwnode_handle_put(fwnode);
return ret;
}
}

if (priv->in.gpio.ngpio != priv->out.gpio.ngpio) {
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9 changes: 7 additions & 2 deletions drivers/pinctrl/stm32/pinctrl-stm32.c
Original file line number Diff line number Diff line change
Expand Up @@ -1224,7 +1224,7 @@ static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl,
struct device *dev = pctl->dev;
struct resource res;
int npins = STM32_GPIO_PINS_PER_BANK;
int bank_nr, err;
int bank_nr, err, i = 0;

if (!IS_ERR(bank->rstc))
reset_control_deassert(bank->rstc);
Expand All @@ -1246,9 +1246,14 @@ static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl,

of_property_read_string(np, "st,bank-name", &bank->gpio_chip.label);

if (!of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, 0, &args)) {
if (!of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, i, &args)) {
bank_nr = args.args[1] / STM32_GPIO_PINS_PER_BANK;
bank->gpio_chip.base = args.args[1];

npins = args.args[2];
while (!of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3,
++i, &args))
npins += args.args[2];
} else {
bank_nr = pctl->nbanks;
bank->gpio_chip.base = bank_nr * STM32_GPIO_PINS_PER_BANK;
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