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Merge tag 'powerpc-6.0-2' of git://git.kernel.org/pub/scm/linux/kerne…
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…l/git/powerpc/linux

Pull powerpc fixes from Michael Ellerman:

 - Ensure we never emit lwarx with EH=1 on 32-bit, because some 32-bit
   CPUs trap on it rather than ignoring it as they should.

 - Fix ftrace when building with clang, which was broken by some
   refactoring.

 - A couple of other minor fixes.

Thanks to Christophe Leroy, Naveen N.  Rao, Nick Desaulniers, Ondrej
Mosnacek, Pali Rohár, Russell Currey, and Segher Boessenkool.

* tag 'powerpc-6.0-2' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
  powerpc/kexec: Fix build failure from uninitialised variable
  powerpc/ppc-opcode: Fix PPC_RAW_TW()
  powerpc64/ftrace: Fix ftrace for clang builds
  powerpc: Make eh value more explicit when using lwarx
  powerpc: Don't hide eh field of lwarx behind a macro
  powerpc: Fix eh field when calling lwarx on PPC32
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torvalds committed Aug 14, 2022
2 parents aea23e7 + 83ee9f2 commit d785610
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Showing 6 changed files with 25 additions and 30 deletions.
5 changes: 3 additions & 2 deletions arch/powerpc/include/asm/atomic.h
Original file line number Diff line number Diff line change
Expand Up @@ -140,17 +140,18 @@ static __always_inline bool
arch_atomic_try_cmpxchg_lock(atomic_t *v, int *old, int new)
{
int r, o = *old;
unsigned int eh = IS_ENABLED(CONFIG_PPC64);

__asm__ __volatile__ (
"1: lwarx %0,0,%2,%5 # atomic_try_cmpxchg_acquire \n"
"1: lwarx %0,0,%2,%[eh] # atomic_try_cmpxchg_acquire \n"
" cmpw 0,%0,%3 \n"
" bne- 2f \n"
" stwcx. %4,0,%2 \n"
" bne- 1b \n"
"\t" PPC_ACQUIRE_BARRIER " \n"
"2: \n"
: "=&r" (r), "+m" (v->counter)
: "r" (&v->counter), "r" (o), "r" (new), "i" (IS_ENABLED(CONFIG_PPC64) ? 1 : 0)
: "r" (&v->counter), "r" (o), "r" (new), [eh] "n" (eh)
: "cr0", "memory");

if (unlikely(r != o))
Expand Down
4 changes: 2 additions & 2 deletions arch/powerpc/include/asm/bitops.h
Original file line number Diff line number Diff line change
Expand Up @@ -163,15 +163,15 @@ static inline unsigned long fn( \
"bne- 1b\n" \
postfix \
: "=&r" (old), "=&r" (t) \
: "rK" (mask), "r" (p), "i" (IS_ENABLED(CONFIG_PPC64) ? eh : 0) \
: "rK" (mask), "r" (p), "n" (eh) \
: "cc", "memory"); \
return (old & mask); \
}

DEFINE_TESTOP(test_and_set_bits, or, PPC_ATOMIC_ENTRY_BARRIER,
PPC_ATOMIC_EXIT_BARRIER, 0)
DEFINE_TESTOP(test_and_set_bits_lock, or, "",
PPC_ACQUIRE_BARRIER, 1)
PPC_ACQUIRE_BARRIER, IS_ENABLED(CONFIG_PPC64))
DEFINE_TESTOP(test_and_change_bits, xor, PPC_ATOMIC_ENTRY_BARRIER,
PPC_ATOMIC_EXIT_BARRIER, 0)

Expand Down
13 changes: 2 additions & 11 deletions arch/powerpc/include/asm/ppc-opcode.h
Original file line number Diff line number Diff line change
Expand Up @@ -343,6 +343,7 @@
#define __PPC_SPR(r) ((((r) & 0x1f) << 16) | ((((r) >> 5) & 0x1f) << 11))
#define __PPC_RC21 (0x1 << 10)
#define __PPC_PRFX_R(r) (((r) & 0x1) << 20)
#define __PPC_EH(eh) (((eh) & 0x1) << 0)

/*
* Both low and high 16 bits are added as SIGNED additions, so if low 16 bits
Expand All @@ -359,16 +360,6 @@
#define PPC_LI_MASK 0x03fffffc
#define PPC_LI(v) ((v) & PPC_LI_MASK)

/*
* Only use the larx hint bit on 64bit CPUs. e500v1/v2 based CPUs will treat a
* larx with EH set as an illegal instruction.
*/
#ifdef CONFIG_PPC64
#define __PPC_EH(eh) (((eh) & 0x1) << 0)
#else
#define __PPC_EH(eh) 0
#endif

/* Base instruction encoding */
#define PPC_RAW_CP_ABORT (0x7c00068c)
#define PPC_RAW_COPY(a, b) (PPC_INST_COPY | ___PPC_RA(a) | ___PPC_RB(b))
Expand Down Expand Up @@ -580,7 +571,7 @@

#define PPC_RAW_BRANCH(offset) (0x48000000 | PPC_LI(offset))
#define PPC_RAW_BL(offset) (0x48000001 | PPC_LI(offset))
#define PPC_RAW_TW(t0, a, b) (0x7f000008 | ___PPC_RS(t0) | ___PPC_RA(a) | ___PPC_RB(b))
#define PPC_RAW_TW(t0, a, b) (0x7c000008 | ___PPC_RS(t0) | ___PPC_RA(a) | ___PPC_RB(b))
#define PPC_RAW_TRAP() PPC_RAW_TW(31, 0, 0)
#define PPC_RAW_SETB(t, bfa) (0x7c000100 | ___PPC_RT(t) | ___PPC_RA((bfa) << 2))

Expand Down
15 changes: 9 additions & 6 deletions arch/powerpc/include/asm/simple_spinlock.h
Original file line number Diff line number Diff line change
Expand Up @@ -48,18 +48,19 @@ static inline int arch_spin_is_locked(arch_spinlock_t *lock)
static inline unsigned long __arch_spin_trylock(arch_spinlock_t *lock)
{
unsigned long tmp, token;
unsigned int eh = IS_ENABLED(CONFIG_PPC64);

token = LOCK_TOKEN;
__asm__ __volatile__(
"1: lwarx %0,0,%2,1\n\
"1: lwarx %0,0,%2,%[eh]\n\
cmpwi 0,%0,0\n\
bne- 2f\n\
stwcx. %1,0,%2\n\
bne- 1b\n"
PPC_ACQUIRE_BARRIER
"2:"
: "=&r" (tmp)
: "r" (token), "r" (&lock->slock)
: "r" (token), "r" (&lock->slock), [eh] "n" (eh)
: "cr0", "memory");

return tmp;
Expand Down Expand Up @@ -156,17 +157,18 @@ static inline void arch_spin_unlock(arch_spinlock_t *lock)
static inline long __arch_read_trylock(arch_rwlock_t *rw)
{
long tmp;
unsigned int eh = IS_ENABLED(CONFIG_PPC64);

__asm__ __volatile__(
"1: lwarx %0,0,%1,1\n"
"1: lwarx %0,0,%1,%[eh]\n"
__DO_SIGN_EXTEND
" addic. %0,%0,1\n\
ble- 2f\n"
" stwcx. %0,0,%1\n\
bne- 1b\n"
PPC_ACQUIRE_BARRIER
"2:" : "=&r" (tmp)
: "r" (&rw->lock)
: "r" (&rw->lock), [eh] "n" (eh)
: "cr0", "xer", "memory");

return tmp;
Expand All @@ -179,17 +181,18 @@ static inline long __arch_read_trylock(arch_rwlock_t *rw)
static inline long __arch_write_trylock(arch_rwlock_t *rw)
{
long tmp, token;
unsigned int eh = IS_ENABLED(CONFIG_PPC64);

token = WRLOCK_TOKEN;
__asm__ __volatile__(
"1: lwarx %0,0,%2,1\n\
"1: lwarx %0,0,%2,%[eh]\n\
cmpwi 0,%0,0\n\
bne- 2f\n"
" stwcx. %1,0,%2\n\
bne- 1b\n"
PPC_ACQUIRE_BARRIER
"2:" : "=&r" (tmp)
: "r" (token), "r" (&rw->lock)
: "r" (token), "r" (&rw->lock), [eh] "n" (eh)
: "cr0", "memory");

return tmp;
Expand Down
8 changes: 4 additions & 4 deletions arch/powerpc/kernel/trace/ftrace.c
Original file line number Diff line number Diff line change
Expand Up @@ -393,11 +393,11 @@ int ftrace_make_nop(struct module *mod,
*/
static bool expected_nop_sequence(void *ip, ppc_inst_t op0, ppc_inst_t op1)
{
if (IS_ENABLED(CONFIG_PPC64_ELF_ABI_V1))
if (IS_ENABLED(CONFIG_DYNAMIC_FTRACE_WITH_REGS))
return ppc_inst_equal(op0, ppc_inst(PPC_RAW_NOP()));
else
return ppc_inst_equal(op0, ppc_inst(PPC_RAW_BRANCH(8))) &&
ppc_inst_equal(op1, ppc_inst(PPC_INST_LD_TOC));
else
return ppc_inst_equal(op0, ppc_inst(PPC_RAW_NOP()));
}

static int
Expand All @@ -412,7 +412,7 @@ __ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
if (copy_inst_from_kernel_nofault(op, ip))
return -EFAULT;

if (IS_ENABLED(CONFIG_PPC64_ELF_ABI_V1) &&
if (!IS_ENABLED(CONFIG_DYNAMIC_FTRACE_WITH_REGS) &&
copy_inst_from_kernel_nofault(op + 1, ip + 4))
return -EFAULT;

Expand Down
10 changes: 5 additions & 5 deletions arch/powerpc/kexec/file_load_64.c
Original file line number Diff line number Diff line change
Expand Up @@ -1043,17 +1043,17 @@ static int copy_property(void *fdt, int node_offset, const struct device_node *d
const char *propname)
{
const void *prop, *fdtprop;
int len = 0, fdtlen = 0, ret;
int len = 0, fdtlen = 0;

prop = of_get_property(dn, propname, &len);
fdtprop = fdt_getprop(fdt, node_offset, propname, &fdtlen);

if (fdtprop && !prop)
ret = fdt_delprop(fdt, node_offset, propname);
return fdt_delprop(fdt, node_offset, propname);
else if (prop)
ret = fdt_setprop(fdt, node_offset, propname, prop, len);

return ret;
return fdt_setprop(fdt, node_offset, propname, prop, len);
else
return -FDT_ERR_NOTFOUND;
}

static int update_pci_dma_nodes(void *fdt, const char *dmapropname)
Expand Down

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