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phy: mediatek: pcie: use new helper to update register bits
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The new helper will use FIELD_PREP() macro to prepare bits value
according to mask, then we no need do it anymore.

Signed-off-by: Chunfeng Yun <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
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Chunfeng Yun authored and vinodkoul committed Sep 24, 2022
1 parent 2b0c004 commit d87f2b8
Showing 1 changed file with 8 additions and 9 deletions.
17 changes: 8 additions & 9 deletions drivers/phy/mediatek/phy-mtk-pcie.c
Original file line number Diff line number Diff line change
Expand Up @@ -89,14 +89,14 @@ static void mtk_pcie_efuse_set_lane(struct mtk_pcie_phy *pcie_phy,
addr = pcie_phy->sif_base + PEXTP_ANA_LN0_TRX_REG +
lane * PEXTP_ANA_LANE_OFFSET;

mtk_phy_update_bits(addr + PEXTP_ANA_TX_REG, EFUSE_LN_TX_PMOS_SEL,
FIELD_PREP(EFUSE_LN_TX_PMOS_SEL, data->tx_pmos));
mtk_phy_update_field(addr + PEXTP_ANA_TX_REG, EFUSE_LN_TX_PMOS_SEL,
data->tx_pmos);

mtk_phy_update_bits(addr + PEXTP_ANA_TX_REG, EFUSE_LN_TX_NMOS_SEL,
FIELD_PREP(EFUSE_LN_TX_NMOS_SEL, data->tx_nmos));
mtk_phy_update_field(addr + PEXTP_ANA_TX_REG, EFUSE_LN_TX_NMOS_SEL,
data->tx_nmos);

mtk_phy_update_bits(addr + PEXTP_ANA_RX_REG, EFUSE_LN_RX_SEL,
FIELD_PREP(EFUSE_LN_RX_SEL, data->rx_data));
mtk_phy_update_field(addr + PEXTP_ANA_RX_REG, EFUSE_LN_RX_SEL,
data->rx_data);
}

/**
Expand All @@ -116,9 +116,8 @@ static int mtk_pcie_phy_init(struct phy *phy)
return 0;

/* Set global data */
mtk_phy_update_bits(pcie_phy->sif_base + PEXTP_ANA_GLB_00_REG,
EFUSE_GLB_INTR_SEL,
FIELD_PREP(EFUSE_GLB_INTR_SEL, pcie_phy->efuse_glb_intr));
mtk_phy_update_field(pcie_phy->sif_base + PEXTP_ANA_GLB_00_REG,
EFUSE_GLB_INTR_SEL, pcie_phy->efuse_glb_intr);

for (i = 0; i < pcie_phy->data->num_lanes; i++)
mtk_pcie_efuse_set_lane(pcie_phy, i);
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