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drm/amd/display: 3.2.211
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DC version 3.2.211 brings along the following fixes:

- Wait for VBLANK during pipe programming
- Adding HDMI SCDC DEVICE_ID define
- Cursor update refactor: PSR-SU support condition
- Update 709 gamma to 2.222 as stated in the standerd
- Consider dp cable id only when data is non zero
- Waiting for 1 frame to fix the flash issue on PSR1
- Update SR watermarks for DCN314
- Allow tuning DCN314 bounding box
- Zeromem mypipe heap struct before using it
- Use min transition for SubVP into MPO
- Disable phantom OTG after enable for plane disable
- Disable DRR actions during state commit
- Fix fallback issues for DP LL 1.4a tests
- Fix FCLK deviation and tool compile issues
- Fix reg timeout in enc314_enable_fifo
- Fix gpio port mapping issue
- Only update link settings after successful MST link train
- Enforce minimum prefetch time for low memclk on DCN32
- Set correct EOTF and Gamut flag in VRR info
- Add margin for max vblank time for SubVP + DRR
- Populate DP2.0 output type for DML pipe

Acked-by: Alan Liu <[email protected]>
Reviewed-by: Alan Liu <[email protected]>
Signed-off-by: Aric Cyr <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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AMD-aric authored and alexdeucher committed Nov 9, 2022
1 parent f936f53 commit e198e55
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion drivers/gpu/drm/amd/display/dc/dc.h
Original file line number Diff line number Diff line change
Expand Up @@ -47,7 +47,7 @@ struct aux_payload;
struct set_config_cmd_payload;
struct dmub_notification;

#define DC_VER "3.2.210"
#define DC_VER "3.2.211"

#define MAX_SURFACES 3
#define MAX_PLANES 6
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