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Commits on Nov 22, 2016

• Stepping version

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• Rename public method depends_on to add_dependency_on

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Commits on Nov 21, 2016

• Added public no_parse argument to avoid parsing source file.

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Commits on Nov 20, 2016

• Merge pull request VUnit#210 from tivervac/patch-1

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Commits on Nov 18, 2016

• Made runner_cfg string creation determinstic

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Commits on Nov 15, 2016

• Encoding cleanup VUnit#167

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Commits on Nov 13, 2016

• Added appveyor.yml to enable CI for Windows

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Commits on Nov 12, 2016

• Merge pull request VUnit#206 from joshrsmith/master

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Commits on Nov 8, 2016

• Fixed incorrect default vhdl_standard when using ui-level add_source_files

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Commits on Nov 2, 2016

• Deterministic library flags.

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Commits on Oct 23, 2016

• Added simulation flags for ActiveHDL. Closes VUnit#202

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Commits on Oct 15, 2016

• Added incisive to about.rst

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• Added script to make necessary modifications to VHDL files to support Cadence Incisive

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• Added class to read/modify/write cadenence incisive .cds files

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Commits on Oct 13, 2016

• Stepping version

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Commits on Oct 8, 2016

• Added .vo as recognized Verilog file ending. Closes VUnit#197

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• Fixed license

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• Added test name to modelsim coverage save command

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Commits on Oct 7, 2016

• Making test output path safe from special characters and long names on windows

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Commits on Aug 7, 2016

• Merge pull request VUnit#192 from VUnit/issue_185

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Commits on Jul 22, 2016

• Split ghdl.flags into ghdl.elab_flags and ghdl.sim_flags

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• Merge pull request VUnit#184 from VUnit/rivierapro_parallel_sim

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Commits on Jul 21, 2016

• Merge pull request VUnit#183 from KevinKes/master

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Commits on Jul 4, 2016

• Merge pull request VUnit#177 from ludli505/master

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Commits on May 19, 2016

• Potential fix for VUnit#167 and VUnit#170

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Commits on Apr 26, 2016

• Improved warning message when incomplete test report due to Ctrl-C

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• Merge pull request VUnit#166 from ehliar/master

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Commits on Apr 20, 2016

• Merge pull request VUnit#165 from go2sh/add_extension

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Commits on Apr 9, 2016

• Fixed license

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• Fixed trailing whitespace

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• Merge pull request VUnit#159 from ehliar/coverage_fix

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• Merge pull request VUnit#158 from ehliar/master

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Commits on Apr 3, 2016

• Stepping version

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• Disable warning is error in documentation build.

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• Fixes Verilog parameter name with wrong case. Closes VUnit#153

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