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qsv: update Comet Lake, Ice Lake and Tiger Lake cpu ids
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galinart authored and sr55 committed Dec 15, 2020
1 parent a6da341 commit 5b5d7a2
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Showing 3 changed files with 10 additions and 0 deletions.
1 change: 1 addition & 0 deletions libhb/handbrake/ports.h
Original file line number Diff line number Diff line change
Expand Up @@ -73,6 +73,7 @@ enum hb_cpu_platform
HB_CPU_PLATFORM_INTEL_CHT,
HB_CPU_PLATFORM_INTEL_SKL,
HB_CPU_PLATFORM_INTEL_KBL,
HB_CPU_PLATFORM_INTEL_CML,
HB_CPU_PLATFORM_INTEL_ICL,
HB_CPU_PLATFORM_INTEL_TGL,
};
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8 changes: 8 additions & 0 deletions libhb/ports.c
Original file line number Diff line number Diff line change
Expand Up @@ -283,6 +283,8 @@ const char* hb_get_cpu_platform_name()
return "Intel microarchitecture Airmont";
case HB_CPU_PLATFORM_INTEL_KBL:
return "Intel microarchitecture Kaby Lake";
case HB_CPU_PLATFORM_INTEL_CML:
return "Intel microarchitecture Comet Lake";
case HB_CPU_PLATFORM_INTEL_ICL:
return "Intel microarchitecture Ice Lake";
case HB_CPU_PLATFORM_INTEL_TGL:
Expand Down Expand Up @@ -377,10 +379,16 @@ static void init_cpu_info()
case 0x9E:
hb_cpu_info.platform = HB_CPU_PLATFORM_INTEL_KBL;
break;
case 0xA5:
case 0xA6:
hb_cpu_info.platform = HB_CPU_PLATFORM_INTEL_CML;
break;
case 0x7D:
case 0x7E:
hb_cpu_info.platform = HB_CPU_PLATFORM_INTEL_ICL;
break;
case 0x8C:
case 0x8D:
hb_cpu_info.platform = HB_CPU_PLATFORM_INTEL_TGL;
break;
default:
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1 change: 1 addition & 0 deletions libhb/qsv_common.c
Original file line number Diff line number Diff line change
Expand Up @@ -130,6 +130,7 @@ int qsv_hardware_generation(int cpu_platform)
case HB_CPU_PLATFORM_INTEL_SKL:
return QSV_G5;
case HB_CPU_PLATFORM_INTEL_KBL:
case HB_CPU_PLATFORM_INTEL_CML:
return QSV_G6;
case HB_CPU_PLATFORM_INTEL_ICL:
return QSV_G7;
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