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Learning FPGA, yosys, nextpnr, and RISC-V

C++ 2,630 248 Updated May 11, 2024

Configurable RISC-V Processor

C 21 2 Updated Dec 23, 2024

Python-based Hardware Design Processing Toolkit for Verilog HDL

Python 649 183 Updated Jun 15, 2024

Full Speed USB DFU interface for FPGA and ASIC designs

Verilog 16 2 Updated Mar 10, 2024

Fully-differential asynchronous non-binary 12-bit SAR-ADC in SKY130, free to re-use under Apache-2.0 license

Verilog 38 6 Updated Jul 30, 2024

RISC-V Linux SoC, marchID: 0x2b

Assembly 730 53 Updated Dec 24, 2024

A FPGA friendly 32 bit RISC-V CPU implementation

Assembly 2,531 421 Updated Nov 15, 2024

SAURIA (Systolic-Array tensor Unit for aRtificial Intelligence Acceleration) is an open-source Convolutional Neural Network accelerator based on a GeMM systolic array engine.

SystemVerilog 24 7 Updated Oct 1, 2024
Assembly 1 Updated Dec 6, 2021

LLM training in simple, raw C/CUDA

Cuda 24,802 2,809 Updated Oct 2, 2024
Python 30 4 Updated Mar 15, 2024

Polar coding, decoding, and testing

SystemVerilog 12 5 Updated Oct 11, 2023

Must-have verilog systemverilog modules

Verilog 1,682 384 Updated Nov 7, 2024

slamplay is a collection of powerful tools to start playing and experimenting with SLAM in C++

C++ 395 40 Updated Dec 18, 2024

MIPS CPU implemented in Verilog

Verilog 581 185 Updated Oct 3, 2017

C++ library to implement invariant extended Kalman filtering for aided inertial navigation.

C++ 469 103 Updated Aug 17, 2019

Verilog Ethernet components for FPGA implementation

Verilog 2,364 709 Updated Jul 18, 2024

HDL libraries and projects

Verilog 1,552 1,532 Updated Dec 20, 2024

opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

Verilog 2,152 290 Updated Nov 12, 2024

NCTU 2021 Spring Integrated Circuit Design Laboratory

Verilog 170 37 Updated Apr 2, 2023

SG90稳定平台

C 13 7 Updated Jul 5, 2024

MPU6050 Triple Axis Gyroscope & Accelerometer Arduino Library

C++ 442 281 Updated May 18, 2023

Numerical differential equation solvers in JAX. Autodifferentiable and GPU-capable. https://docs.kidger.site/diffrax/

Python 1,486 135 Updated Dec 24, 2024

Model-predictive control for microcontrollers

C++ 672 85 Updated Dec 5, 2024

open-source IEEE 802.11 WiFi baseband FPGA (chip) design: driver, software

C 3,948 664 Updated Dec 15, 2024

Sythesizable, modular Verilog implementation of 802.11 OFDM decoder.

Verilog 387 194 Updated Jan 29, 2023

Robotics with GPU computing

C++ 936 109 Updated Oct 6, 2024
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