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arc: add _ARC_V2_IRQ_TRIGGER inline function
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ARC interrupts can be either level or pulse.

Level interrupts remain asserted until the interrupt service routine
clears the interrupt at the peripheral. This is the default and most
common case.

Pulse interrupts have an extra flip-flop that converts a pulse to a 
level. The ARC auto-clears this level as the interrupt service routine
is entered. As such, an interrupt handler for a pulse interrupt need
not clear the interrupt.
It is the rare device that uses pulse interrupts.

Nothing currently calls this inline function so ARC interrupts are
LEVEL by default.

(see ZEP-83)

Change-Id: I09ef86aae1926c1327e82ff99c2f8aa7eabde684
Signed-off-by: Chuck Jordan <[email protected]>
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cjordan44 authored and Anas Nashif committed Oct 7, 2016
1 parent ed569f5 commit 5b1198a
Showing 1 changed file with 17 additions and 0 deletions.
17 changes: 17 additions & 0 deletions include/arch/arc/v2/arcv2_irq_unit.h
Original file line number Diff line number Diff line change
Expand Up @@ -107,6 +107,23 @@ static inline void _arc_v2_irq_unit_prio_set(int irq, unsigned char prio)
_arc_v2_aux_reg_write(_ARC_V2_IRQ_PRIORITY, prio);
}

/*
* @brief Set interrupt sensitivity
*
* Set the sensitivity of the specified interrupt to either
* _ARC_V2_INT_LEVEL or _ARC_V2_INT_PULSE. Level interrupts will remain
* asserted until the interrupt handler clears the interrupt at the peripheral.
* Pulse interrupts self-clear as the interrupt handler is entered.
*
* @return N/A
*/

static inline void _arc_v2_irq_unit_sensitivity_set(int irq, int s)
{
_arc_v2_aux_reg_write(_ARC_V2_IRQ_SELECT, irq);
_arc_v2_aux_reg_write(_ARC_V2_IRQ_TRIGGER, s);
}

void _arc_v2_irq_unit_int_eoi(int irq);
void _arc_v2_irq_unit_init(void);

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