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timing: add support for nordic SoCs with RTC timer
Add abstraction for nordic SoCs using Nordic RTC as the source for timestamps and cycles. Signed-off-by: Anas Nashif <[email protected]>
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/* | ||
* Copyright (c) 2020 Intel Corporation. | ||
* | ||
* SPDX-License-Identifier: Apache-2.0 | ||
*/ | ||
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#include <arch/arm/aarch32/arch.h> | ||
#include <kernel.h> | ||
#include <sys_clock.h> | ||
#include <timing/timing.h> | ||
#include <nrfx.h> | ||
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#if defined(CONFIG_NRF_RTC_TIMER) | ||
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#define CYCLES_PER_SEC (16000000 / (1 << NRF_TIMER2->PRESCALER)) | ||
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void timing_init(void) | ||
{ | ||
NRF_TIMER2->TASKS_CLEAR = 1; /* Clear Timer */ | ||
NRF_TIMER2->MODE = 0; /* Timer Mode */ | ||
NRF_TIMER2->PRESCALER = 0; /* 16M Hz */ | ||
NRF_TIMER2->BITMODE = 3; /* 32 - bit */ | ||
} | ||
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void timing_start(void) | ||
{ | ||
NRF_TIMER2->TASKS_START = 1; | ||
} | ||
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void timing_stop(void) | ||
{ | ||
NRF_TIMER2->TASKS_STOP = 1; /* Stop Timer */ | ||
} | ||
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timing_t timing_counter_get(void) | ||
{ | ||
NRF_TIMER2->TASKS_CAPTURE[0] = 1; | ||
return NRF_TIMER2->CC[0] * ((SystemCoreClock) / CYCLES_PER_SEC); | ||
} | ||
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uint64_t timing_cycles_get(volatile timing_t *const start, | ||
volatile timing_t *const end) | ||
{ | ||
return (*end - *start); | ||
} | ||
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uint64_t timing_freq_get(void) | ||
{ | ||
return SystemCoreClock; | ||
} | ||
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uint64_t timing_cycles_to_ns(uint64_t cycles) | ||
{ | ||
return (cycles) * (NSEC_PER_SEC) / (SystemCoreClock); | ||
} | ||
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uint64_t timing_cycles_to_ns_avg(uint64_t cycles, uint32_t count) | ||
{ | ||
return timing_cycles_to_ns(cycles) / count; | ||
} | ||
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uint32_t timing_freq_get_mhz(void) | ||
{ | ||
return (uint32_t)(timing_freq_get() / 1000000); | ||
} | ||
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#endif |