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Commits on Sep 6, 2022

• drm: xlnx: dp: share the dp registers to dp audio driver

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• drm: xlnx: dp: Fix the condition check and get audio clock rate

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Commits on Mar 25, 2022

• sound: soc: xilinx: Correct channel status register value for 48k sampled audio

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Commits on Mar 14, 2022

• clk: xilinx: vcu: don't set pll_ref as parent of VCU(enc/dec) clocks

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Commits on Mar 9, 2022

• dmaengine: xilinx: frmbuf: Add support for 3 planar YUV444P 8bpc

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• dt-bindings: dma: xilinx_frmbuf: Add support for 3 planar YUV444P 8bpc

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• v4l: xilinx: vip: Support for 3 planar YUV444 8bpc format in contiguous memory

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• media: v4l: Support 3 planar YUV444P 8bpc pixel format in contiguous memory

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Commits on Mar 4, 2022

• sound: soc: xilinx: Added 44.1k & 48k sample rate support for DP

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• arm64: xilinx: dts: Move DP audio registers to separate node

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• dt-bindings: display: xlnx: extract zynqmp dpaud setting to separate binding

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Commits on Feb 25, 2022

• v4l: xilinx: vip: Support for 3 planar YUV444 10bpc format in contiguous memory

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• media: v4l: Support 3 planar YUV 444 10bpc pixel format in contiguous memory

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Commits on Feb 4, 2022

• staging: xlnxsync: Added IOCTL to reset the current syncIp slot

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Commits on Jan 25, 2022

• drm: xlnx: zynqmp_dp: release reset for DP before accessing DP registers

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Commits on Jan 7, 2022

• clk: xilinx: vcu: disable aclk incase of probe failure

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Commits on Dec 16, 2021

• dt-bindings: clk: xlnx: Update VCU bindings for vcu reset pin

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• dt-bindings: clk: xlnx: move xlnx_vcu dt-binding to clk from soc

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• soc: xilinx: vcu: Export functions to obtain logicore settings

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• drm: xlnx: drv: unbind all components before framebuffer cleanup

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Commits on May 12, 2021

• drm: xlnx: zynqmp_dp: fix suspend/resume issue

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Commits on Apr 7, 2021

• dmaengine: xilinx: dpdma: Add support for cyclic dma mode

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Commits on Mar 22, 2021

• drm: xlnx: zynqmp_dpsub: Fix pixel clock issue

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• staging: xlnxsync: Reuse the xlnxsync_err_intr structure

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• staging: xlnxsync: Switch to rising edge interrupt

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• staging: xlnxsync: Rename interrupt mask register macro

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• staging: xlnxsync: Remove channel interrupt mask handling at enable/disable

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• staging: xlnxsync: Check synchronization and watchdog error for consumer

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• staging: xlnxsync: Check valid bit for luma/chroma done interrupts

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• staging: xlnxsync: Don't write back Interrupt status register(ISR)

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• drm: xlnx: drv: drop master only while releasing last master on a drm device

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Commits on Dec 17, 2020

• sound: soc: xilinx: Use unique dai link per device

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Commits on Oct 9, 2020

• staging: xlnxsync: Reuse the xlnxsync_err_intr structure

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• staging: xlnxsync: Switch to rising edge interrupt

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• staging: xlnxsync: Rename interrupt mask register macro

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