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Mark FP_EXTEND form v2f32 to v2f64 as "expand" for ARM NEON. Patch by…
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… Pete Couperus.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168240 91177308-0d34-0410-b5e6-96231b3b80d8
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eefriedman committed Nov 17, 2012
1 parent 0a63b6a commit 43147af
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Showing 3 changed files with 10 additions and 0 deletions.
1 change: 1 addition & 0 deletions lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -222,6 +222,7 @@ SDValue VectorLegalizer::LegalizeOp(SDValue Op) {
case ISD::FNEARBYINT:
case ISD::FFLOOR:
case ISD::FP_ROUND:
case ISD::FP_EXTEND:
case ISD::FMA:
case ISD::SIGN_EXTEND_INREG:
QueryType = Node->getValueType(0);
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1 change: 1 addition & 0 deletions lib/Target/ARM/ARMISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -544,6 +544,7 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM)
setOperationAction(ISD::FP_TO_SINT, MVT::v4i16, Custom);

setOperationAction(ISD::FP_ROUND, MVT::v2f32, Expand);
setOperationAction(ISD::FP_EXTEND, MVT::v2f64, Expand);

setTargetDAGCombine(ISD::INTRINSIC_VOID);
setTargetDAGCombine(ISD::INTRINSIC_W_CHAIN);
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8 changes: 8 additions & 0 deletions test/CodeGen/ARM/neon_fpconv.ll
Original file line number Diff line number Diff line change
Expand Up @@ -7,3 +7,11 @@ define <2 x float> @vtrunc(<2 x double> %a) {
%vt = fptrunc <2 x double> %a to <2 x float>
ret <2 x float> %vt
}

define <2 x double> @vextend(<2 x float> %a) {
; CHECK: vcvt.f64.f32 [[D0:d[0-9]+]], [[S0:s[0-9]+]]
; CHECK: vcvt.f64.f32 [[D1:d[0-9]+]], [[S1:s[0-9]+]]
%ve = fpext <2 x float> %a to <2 x double>
ret <2 x double> %ve
}

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