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drm/i915/dsi: fix MIPI_BKLT_EN_1 native GPIO index
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Due to copy-paste fail, MIPI_BKLT_EN_1 would always use PPS index 1,
never 0. Fix the sloppiest commit in recent memory.

Fixes: 963bbdb ("drm/i915/dsi: add support for ICL+ native MIPI GPIO sequence")
Reported-by: Ville Syrjälä <[email protected]>
Signed-off-by: Jani Nikula <[email protected]>
Reviewed-by: Ville Syrjälä <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
(cherry picked from commit a561933)
Cc: [email protected] # 6.1
Signed-off-by: Rodrigo Vivi <[email protected]>
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jnikula authored and rodrigovivi committed Dec 30, 2022
1 parent 963bbdb commit 6217e9f
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion drivers/gpu/drm/i915/display/intel_dsi_vbt.c
Original file line number Diff line number Diff line change
Expand Up @@ -430,7 +430,7 @@ static void icl_native_gpio_set_value(struct drm_i915_private *dev_priv,
break;
case MIPI_BKLT_EN_1:
case MIPI_BKLT_EN_2:
index = gpio == MIPI_AVDD_EN_1 ? 0 : 1;
index = gpio == MIPI_BKLT_EN_1 ? 0 : 1;

intel_de_rmw(dev_priv, PP_CONTROL(index), EDP_BLC_ENABLE,
value ? EDP_BLC_ENABLE : 0);
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