forked from torvalds/linux
-
Notifications
You must be signed in to change notification settings - Fork 0
Commit
This commit does not belong to any branch on this repository, and may belong to a fork outside of the repository.
Merge tag 'drm-msm-next-2023-04-10' of https://gitlab.freedesktop.org…
…/drm/msm into drm-next main pull request for v6.4 Core Display: ============ * Bugfixes for error handling during probe * rework UBWC decoder programming * prepare_commit cleanup * bindings for SM8550 (MDSS, DPU), SM8450 (DP) * timeout calculation fixup * atomic: use drm_crtc_next_vblank_start() instead of our own custom thing to calculate the start of next vblank DP: == * interrupts cleanup DPU: === * DSPP sub-block flush on sc7280 * support AR30 in addition to XR30 format * Allow using REC_0 and REC_1 to handle wide (4k) RGB planes * Split the HW catalog into individual per-SoC files DSI: === * rework DSI instance ID detection on obscure platforms GPU: === * uapi C++ compatibility fix * a6xx: More robust gdsc reset * a3xx and a4xx devfreq support * update generated headers * various cleanups and fixes * GPU and GEM updates to avoid allocations which could trigger reclaim (shrinker) in fence signaling path * dma-fence deadline hint support and wait-boost * a640 speedbin support * a650 speedbin support Conflicts in drivers/gpu/drm/msm/adreno/adreno_gpu.c: Conflict between the 7fa5047 ("drm: Use of_property_present() for testing DT property presence") and 9f251f9 ("drm/msm/adreno: Use OPP for every GPU generation"). The latter removed the of_ function call outright, so I went with what's in the PR unchanged. From: Rob Clark <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGvwuj5tabyW910+N-B=5kFNAC7QNYoQ=0xi3roBjQvFFQ@mail.gmail.com Signed-off-by: Daniel Vetter <[email protected]>
- Loading branch information
Showing
122 changed files
with
7,037 additions
and
4,526 deletions.
There are no files selected for viewing
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
133 changes: 133 additions & 0 deletions
133
Documentation/devicetree/bindings/display/msm/qcom,sm8550-dpu.yaml
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,133 @@ | ||
| # SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause | ||
| %YAML 1.2 | ||
| --- | ||
| $id: http://devicetree.org/schemas/display/msm/qcom,sm8550-dpu.yaml# | ||
| $schema: http://devicetree.org/meta-schemas/core.yaml# | ||
|
|
||
| title: Qualcomm SM8550 Display DPU | ||
|
|
||
| maintainers: | ||
| - Neil Armstrong <[email protected]> | ||
|
|
||
| $ref: /schemas/display/msm/dpu-common.yaml# | ||
|
|
||
| properties: | ||
| compatible: | ||
| const: qcom,sm8550-dpu | ||
|
|
||
| reg: | ||
| items: | ||
| - description: Address offset and size for mdp register set | ||
| - description: Address offset and size for vbif register set | ||
|
|
||
| reg-names: | ||
| items: | ||
| - const: mdp | ||
| - const: vbif | ||
|
|
||
| clocks: | ||
| items: | ||
| - description: Display AHB | ||
| - description: Display hf axi | ||
| - description: Display MDSS ahb | ||
| - description: Display lut | ||
| - description: Display core | ||
| - description: Display vsync | ||
|
|
||
| clock-names: | ||
| items: | ||
| - const: bus | ||
| - const: nrt_bus | ||
| - const: iface | ||
| - const: lut | ||
| - const: core | ||
| - const: vsync | ||
|
|
||
| required: | ||
| - compatible | ||
| - reg | ||
| - reg-names | ||
| - clocks | ||
| - clock-names | ||
|
|
||
| unevaluatedProperties: false | ||
|
|
||
| examples: | ||
| - | | ||
| #include <dt-bindings/clock/qcom,sm8550-dispcc.h> | ||
| #include <dt-bindings/clock/qcom,sm8550-gcc.h> | ||
| #include <dt-bindings/interrupt-controller/arm-gic.h> | ||
| #include <dt-bindings/power/qcom-rpmpd.h> | ||
| display-controller@ae01000 { | ||
| compatible = "qcom,sm8550-dpu"; | ||
| reg = <0x0ae01000 0x8f000>, | ||
| <0x0aeb0000 0x2008>; | ||
| reg-names = "mdp", "vbif"; | ||
| clocks = <&gcc GCC_DISP_AHB_CLK>, | ||
| <&gcc GCC_DISP_HF_AXI_CLK>, | ||
| <&dispcc DISP_CC_MDSS_AHB_CLK>, | ||
| <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>, | ||
| <&dispcc DISP_CC_MDSS_MDP_CLK>, | ||
| <&dispcc DISP_CC_MDSS_VSYNC_CLK>; | ||
| clock-names = "bus", | ||
| "nrt_bus", | ||
| "iface", | ||
| "lut", | ||
| "core", | ||
| "vsync"; | ||
| assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>; | ||
| assigned-clock-rates = <19200000>; | ||
| operating-points-v2 = <&mdp_opp_table>; | ||
| power-domains = <&rpmhpd SM8550_MMCX>; | ||
| interrupt-parent = <&mdss>; | ||
| interrupts = <0>; | ||
| ports { | ||
| #address-cells = <1>; | ||
| #size-cells = <0>; | ||
| port@0 { | ||
| reg = <0>; | ||
| dpu_intf1_out: endpoint { | ||
| remote-endpoint = <&dsi0_in>; | ||
| }; | ||
| }; | ||
| port@1 { | ||
| reg = <1>; | ||
| dpu_intf2_out: endpoint { | ||
| remote-endpoint = <&dsi1_in>; | ||
| }; | ||
| }; | ||
| }; | ||
| mdp_opp_table: opp-table { | ||
| compatible = "operating-points-v2"; | ||
| opp-200000000 { | ||
| opp-hz = /bits/ 64 <200000000>; | ||
| required-opps = <&rpmhpd_opp_low_svs>; | ||
| }; | ||
| opp-325000000 { | ||
| opp-hz = /bits/ 64 <325000000>; | ||
| required-opps = <&rpmhpd_opp_svs>; | ||
| }; | ||
| opp-375000000 { | ||
| opp-hz = /bits/ 64 <375000000>; | ||
| required-opps = <&rpmhpd_opp_svs_l1>; | ||
| }; | ||
| opp-514000000 { | ||
| opp-hz = /bits/ 64 <514000000>; | ||
| required-opps = <&rpmhpd_opp_nom>; | ||
| }; | ||
| }; | ||
| }; | ||
| ... |
Oops, something went wrong.