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(remove trailing blanks) (makes for cleaner patches)
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git-svn-id: file:///home/jj/hercules.svn/trunk@7430 956126f8-22a0-4046-8f4a-272fa8102e63
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Fish (David B Trout) committed Apr 20, 2011
1 parent c8a2d98 commit 774a8b0
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Showing 2 changed files with 45 additions and 45 deletions.
82 changes: 41 additions & 41 deletions qeth.c
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Original file line number Diff line number Diff line change
Expand Up @@ -98,7 +98,7 @@ static const BYTE read_configuration_data_bytes[128] = {
/* Token NED */
/*-------------------------------------------------------------------*/
0xF0, // 64: NED code
0x00, // 65: Type (X'00' = N/A)
0x00, // 65: Type (X'00' = N/A)
0x00, // 66: Class (X'00' = N/A)
0x00, // 67: (Reserved)
0xF0,0xF0,0xF1,0xF7,0xF3,0xF0, // 68-73: Type ('001730')
Expand Down Expand Up @@ -294,7 +294,7 @@ U32 ackseq;
case PDU_CMD_ENABLE:
VERIFY(!TUNTAP_CreateInterface(grp->tuntap,
((pdu->proto != PDU_PROTO_L3) ? IFF_TAP : IFF_TUN) | IFF_NO_PI,
&grp->ttfd,
&grp->ttfd,
grp->ttdevn));

/* Set Non-Blocking mode */
Expand Down Expand Up @@ -357,7 +357,7 @@ U32 ackseq;
switch(cmd) {

case IPA_SAP_QUERY:
{
{
SAP_QRY *qry = (SAP_QRY*)(sap+1);
TRACE("Query SubCommands\n");
STORE_FW(qry->suppcm,IPA_SAP_SUPP);
Expand Down Expand Up @@ -560,17 +560,17 @@ OSA_IEAR *iear = (OSA_IEAR*)rdev->qrspbf;
FETCH_HW(datadev, iea->datadev);
if(!IS_OSA_READ_DEVICE(dev))
{
TRACE(_("QETH: IDX ACTIVATE READ Invalid for %s Device %4.4x\n"),osa_devtyp[dev->member],dev->devnum);
TRACE(_("QETH: IDX ACTIVATE READ Invalid for %s Device %4.4x\n"),osa_devtyp[dev->member],dev->devnum);
dev->qidxstate = OSA_IDX_STATE_INACTIVE;
}
else if((iea->port & ~IDX_ACT_PORT) != OSA_PORTNO)
{
TRACE(_("QETH: IDX ACTIVATE READ Invalid OSA Port %d for %s Device %4.4x\n"),(iea->port & ~IDX_ACT_PORT),osa_devtyp[dev->member],dev->devnum);
TRACE(_("QETH: IDX ACTIVATE READ Invalid OSA Port %d for %s Device %4.4x\n"),(iea->port & ~IDX_ACT_PORT),osa_devtyp[dev->member],dev->devnum);
dev->qidxstate = OSA_IDX_STATE_INACTIVE;
}
else if(datadev != dev->group->memdev[OSA_DATA_DEVICE]->devnum)
{
TRACE(_("QETH: IDX ACTIVATE READ Invalid OSA Data Device %d for %s Device %4.4x\n"),datadev,osa_devtyp[dev->member],dev->devnum);
TRACE(_("QETH: IDX ACTIVATE READ Invalid OSA Data Device %d for %s Device %4.4x\n"),datadev,osa_devtyp[dev->member],dev->devnum);
dev->qidxstate = OSA_IDX_STATE_INACTIVE;
}
else
Expand All @@ -587,17 +587,17 @@ OSA_IEAR *iear = (OSA_IEAR*)rdev->qrspbf;
FETCH_HW(datadev, iea->datadev);
if(!IS_OSA_WRITE_DEVICE(dev))
{
TRACE(_("QETH: IDX ACTIVATE WRITE Invalid for %s Device %4.4x\n"),osa_devtyp[dev->member],dev->devnum);
TRACE(_("QETH: IDX ACTIVATE WRITE Invalid for %s Device %4.4x\n"),osa_devtyp[dev->member],dev->devnum);
dev->qidxstate = OSA_IDX_STATE_INACTIVE;
}
else if((iea->port & ~IDX_ACT_PORT) != OSA_PORTNO)
{
TRACE(_("QETH: IDX ACTIVATE WRITE Invalid OSA Port %d for %s Device %4.4x\n"),(iea->port & ~IDX_ACT_PORT),osa_devtyp[dev->member],dev->devnum);
TRACE(_("QETH: IDX ACTIVATE WRITE Invalid OSA Port %d for %s Device %4.4x\n"),(iea->port & ~IDX_ACT_PORT),osa_devtyp[dev->member],dev->devnum);
dev->qidxstate = OSA_IDX_STATE_INACTIVE;
}
else if(datadev != dev->group->memdev[OSA_DATA_DEVICE]->devnum)
{
TRACE(_("QETH: IDX ACTIVATE WRITE Invalid OSA Data Device %d for %s Device %4.4x\n"),datadev,osa_devtyp[dev->member],dev->devnum);
TRACE(_("QETH: IDX ACTIVATE WRITE Invalid OSA Data Device %d for %s Device %4.4x\n"),datadev,osa_devtyp[dev->member],dev->devnum);
dev->qidxstate = OSA_IDX_STATE_INACTIVE;
}
else
Expand All @@ -611,7 +611,7 @@ OSA_IEAR *iear = (OSA_IEAR*)rdev->qrspbf;
break;

default:
TRACE(_("QETH: IDX ACTIVATE Invalid Request %4.4x for %s device %4.4x\n"),reqtype,osa_devtyp[dev->member],dev->devnum);
TRACE(_("QETH: IDX ACTIVATE Invalid Request %4.4x for %s device %4.4x\n"),reqtype,osa_devtyp[dev->member],dev->devnum);
dev->qidxstate = OSA_IDX_STATE_INACTIVE;
break;
}
Expand Down Expand Up @@ -642,10 +642,10 @@ static void raise_adapter_interrupt(DEVBLK *dev)
// When must go through the queues and buffers on a round robin basis
// such that buffers are re-used on a least recently used bases.
// When no buffer are available we will must keep our current position
// When a buffer becomes available, then we will advance to that location
// When we reach the end of the buffer queue, we will advance to the
// next available queue.
// When a queue is newly enabled then we will start at the beginning of
// When a buffer becomes available, then we will advance to that location
// When we reach the end of the buffer queue, we will advance to the
// next available queue.
// When a queue is newly enabled then we will start at the beginning of
// the queue (this is handled in signal adapter)

/*-------------------------------------------------------------------*/
Expand All @@ -669,7 +669,7 @@ int noread = 1;
slsb = (OSA_SLSB*)(dev->mainstor + grp->i_slsbla[iq]);

while(mb--)
if(slsb->slsbe[ib] == SLSBE_INPUT_EMPTY)
if(slsb->slsbe[ib] == SLSBE_INPUT_EMPTY)
{
OSA_SL *sl = (OSA_SL*)(dev->mainstor + grp->i_sla[iq]);
U64 sa; U32 len; BYTE *buf;
Expand All @@ -684,7 +684,7 @@ int noread = 1;
FETCH_DW(sa,sl->sbala[ib]);
if(STORCHK(sa,sizeof(OSA_SBAL)-1,grp->i_slk[iq],STORKEY_REF,dev))
{
slsb->slsbe[ib] = SLSBE_ERROR;
slsb->slsbe[ib] = SLSBE_ERROR;
grp->reqpci = TRUE;
TRACE(_("STORCHK ERROR sa(%llx), key(%2.2x)\n"),sa,grp->i_slk[iq]);
return;
Expand All @@ -696,10 +696,10 @@ int noread = 1;
FETCH_DW(la,sbal->sbale[ns].addr);
FETCH_FW(len,sbal->sbale[ns].length);
if(!len)
break; // Or should this be continue - ie a discontiguous sbal???
break; // Or should this be continue - ie a discontiguous sbal???
if(STORCHK(la,len-1,grp->i_sbalk[iq],STORKEY_CHANGE,dev))
{
slsb->slsbe[ib] = SLSBE_ERROR;
slsb->slsbe[ib] = SLSBE_ERROR;
grp->reqpci = TRUE;
TRACE(_("STORCHK ERROR la(%llx), len(%d), key(%2.2x)\n"),la,len,grp->i_sbalk[iq]);
return;
Expand Down Expand Up @@ -757,7 +757,7 @@ DUMP("INPUT BUF",hdr2,olen+sizeof(OSA_HDR2));
else
break;
}

if(tlen > 0)
{
grp->reqpci = TRUE;
Expand Down Expand Up @@ -800,7 +800,7 @@ DUMP("INPUT BUF",hdr2,olen+sizeof(OSA_HDR2));
else
if(++iq >= grp->i_qcnt)
iq = 0;

if(noread)
{
char buff[4096];
Expand Down Expand Up @@ -832,7 +832,7 @@ int mq = grp->o_qcnt;
slsb = (OSA_SLSB*)(dev->mainstor + grp->o_slsbla[oq]);

while(mb--)
if(slsb->slsbe[ob] == SLSBE_OUTPUT_PRIMED)
if(slsb->slsbe[ob] == SLSBE_OUTPUT_PRIMED)
{
OSA_SL *sl = (OSA_SL*)(dev->mainstor + grp->o_sla[oq]);
U64 sa; U32 len; BYTE *buf;
Expand All @@ -845,7 +845,7 @@ int mq = grp->o_qcnt;
FETCH_DW(sa,sl->sbala[ob]);
if(STORCHK(sa,sizeof(OSA_SBAL)-1,grp->o_slk[oq],STORKEY_REF,dev))
{
slsb->slsbe[ob] = SLSBE_ERROR;
slsb->slsbe[ob] = SLSBE_ERROR;
grp->reqpci = TRUE;
TRACE(_("STORCHK ERROR sa(%llx), key(%2.2x)\n"),sa,grp->o_slk[oq]);
return;
Expand All @@ -857,10 +857,10 @@ int mq = grp->o_qcnt;
FETCH_DW(la,sbal->sbale[ns].addr);
FETCH_FW(len,sbal->sbale[ns].length);
if(!len)
break; // Or should this be continue - ie a discontiguous sbal???
break; // Or should this be continue - ie a discontiguous sbal???
if(STORCHK(la,len-1,grp->o_sbalk[oq],STORKEY_REF,dev))
{
slsb->slsbe[ob] = SLSBE_ERROR;
slsb->slsbe[ob] = SLSBE_ERROR;
grp->reqpci = TRUE;
TRACE(_("STORCHK ERROR la(%llx), len(%d), key(%2.2x)\n"),la,len,grp->o_sbalk[oq]);
return;
Expand Down Expand Up @@ -892,7 +892,7 @@ else { TRACE("OUTPUT DROPPED, INVALID MAC\n"); }
if((sbal->sbale[ns].flags[1] & SBAL_FLAGS1_PCI_REQ))
grp->reqpci = TRUE;
}

slsb->slsbe[ob] = SLSBE_OUTPUT_COMPLETED;
STORAGE_KEY(grp->o_slsbla[oq], dev) |= (STORKEY_REF|STORKEY_CHANGE);
if(++ob >= 128)
Expand Down Expand Up @@ -936,7 +936,7 @@ OSA_GRP *grp = (OSA_GRP*)dev->group->grp_data;
write_pipe(grp->ppfd[1],"*",1);
}
else
if(IS_OSA_READ_DEVICE(dev)
if(IS_OSA_READ_DEVICE(dev)
&& (dev->group->acount == OSA_GROUP_SIZE))
signal_condition(&grp->qcond);

Expand All @@ -955,7 +955,7 @@ int i;
dev->numdevid = sizeof(sense_id_bytes);
memcpy(dev->devid, sense_id_bytes, sizeof(sense_id_bytes));
dev->devtype = dev->devid[1] << 8 | dev->devid[2];

dev->pmcw.flag4 |= PMCW4_Q;

if(!(grouped = group_device(dev,OSA_GROUP_SIZE)) && !dev->member)
Expand All @@ -967,7 +967,7 @@ int i;

initialize_condition(&grp->qcond);
initialize_lock(&grp->qlock);

/* Open write signalling pipe */
create_pipe(grp->ppfd);

Expand Down Expand Up @@ -1054,7 +1054,7 @@ char qdiostat[80];
}
else
strcpy(qdiostat," QDIO");

snprintf (buffer, buflen-1, "%s%s%s",
(dev->group->acount == OSA_GROUP_SIZE) ? osa_devtyp[dev->member] : "*Incomplete",
(dev->scsw.flag2 & SCSW2_Q) ? qdiostat : "",
Expand All @@ -1079,7 +1079,7 @@ OSA_GRP *grp = (OSA_GRP*)dev->group->grp_data;
close_pipe(grp->ppfd[0]);
if(grp->ppfd[1])
close_pipe(grp->ppfd[1]);

if(grp->tuntap)
free(grp->tuntap);
if(grp->tthwaddr)
Expand All @@ -1093,7 +1093,7 @@ OSA_GRP *grp = (OSA_GRP*)dev->group->grp_data;

destroy_condition(&grp->qcond);
destroy_lock(&grp->qlock);

free(dev->group->grp_data);
dev->group->grp_data = NULL;
}
Expand Down Expand Up @@ -1163,15 +1163,15 @@ int num; /* Number of bytes to move */
U16 ddc;

/* Device block of device to which response is sent */
DEVBLK *rdev = (IS_OSA_WRITE_DEVICE(dev)
DEVBLK *rdev = (IS_OSA_WRITE_DEVICE(dev)
&& (dev->qidxstate == OSA_IDX_STATE_ACTIVE)
&& (dev->group->memdev[OSA_READ_DEVICE]->qidxstate == OSA_IDX_STATE_ACTIVE))
&& (dev->group->memdev[OSA_READ_DEVICE]->qidxstate == OSA_IDX_STATE_ACTIVE))
? dev->group->memdev[OSA_READ_DEVICE] : dev;

if(!rdev->qrspsz)
{
FETCH_HW(ddc,hdr->ddc);

obtain_lock(&grp->qlock);
if(ddc == IDX_ACT_DDC)
osa_device_cmd(dev,(OSA_IEA*)iobuf, rdev);
Expand All @@ -1181,12 +1181,12 @@ int num; /* Number of bytes to move */

if(dev != rdev)
signal_condition(&grp->qcond);

/* Calculate number of bytes to write and set residual count */
num = (count < RSP_BUFSZ) ? count : RSP_BUFSZ;
*residual = count - num;
if (count < RSP_BUFSZ) *more = 1;

/* Return normal status */
*unitstat = CSW_CE | CSW_DE;
}
Expand Down Expand Up @@ -1328,7 +1328,7 @@ int num; /* Number of bytes to move */
*unitstat = CSW_CE | CSW_DE;
break;


case OSA_EQ:
/*---------------------------------------------------------------*/
/* ESTABLISH QUEUES */
Expand Down Expand Up @@ -1365,7 +1365,7 @@ int num; /* Number of bytes to move */
grp->i_slk[i] = (qdes->keyp1 << 4) & 0xF0;
grp->i_sbalk[i] = qdes->keyp2 & 0xF0;
grp->i_slsblk[i] = (qdes->keyp2 << 4) & 0xF0;

accerr |= STORCHK(grp->i_slsbla[i],sizeof(OSA_SLSB)-1,grp->i_slsblk[i],STORKEY_CHANGE,dev);
accerr |= STORCHK(grp->i_sla[i],sizeof(OSA_SL)-1,grp->i_slk[i],STORKEY_REF,dev);

Expand Down Expand Up @@ -1419,7 +1419,7 @@ int num; /* Number of bytes to move */
grp->i_qmask = grp->o_qmask = 0;

FD_ZERO( &readset );

dev->scsw.flag2 |= SCSW2_Q;

do {
Expand All @@ -1434,7 +1434,7 @@ int num; /* Number of bytes to move */
{
char c;
read_pipe(grp->ppfd[0],&c,1);

if(grp->o_qmask)
process_output_queue(dev);
}
Expand Down Expand Up @@ -1487,7 +1487,7 @@ int noselrd;
/* Return CC1 if the device is not QDIO active */
if(!(dev->scsw.flag2 & SCSW2_Q))
return 1;

/* Is there a read select */
noselrd = !grp->i_qmask;

Expand Down
8 changes: 4 additions & 4 deletions qeth.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -158,8 +158,8 @@ typedef struct _OSA_QDES0 {
/*000*/ DBLWRD sliba; /* Storage List Info Block Address */
/*008*/ DBLWRD sla; /* Storage List Address */
/*010*/ DBLWRD slsba; /* Storage List State Block Address */
/*018*/ FWORD resv018;
/*01C*/ BYTE keyp1; /* Access keys for SLIB and SL */
/*018*/ FWORD resv018;
/*01C*/ BYTE keyp1; /* Access keys for SLIB and SL */
#define QDES_KEYP1_A_SLIB 0xF0
#define QDES_KEYP1_A_SL 0x0F
/*01D*/ BYTE keyp2; /* Access keys for SBALs ad SLSB */
Expand Down Expand Up @@ -187,7 +187,7 @@ typedef struct _OSA_QDR {
/*00B*/ BYTE oqdsz; /* Output Queue Descriptor Size */
/*00C*/ FWORD resv00c[9];
/*030*/ DBLWRD qiba; /* Queue Information Block Address */
/*038*/ FWORD resv038;
/*038*/ FWORD resv038;
/*03C*/ BYTE qkey; /* Queue Information Block Key */
/*03D*/ BYTE resv03d[3];
/*040*/ OSA_QDES0 qdf0[126]; /* Format 0 Queue Descriptors */
Expand Down Expand Up @@ -349,7 +349,7 @@ typedef struct _OSA_IEAR {
#define IDX_RSP_CMD_TERM 0xC0 /* IDX_TERMINATE received */
/*003*/ BYTE resv003; /* */
/*004*/ BYTE reason; /* Reason code */
#define IDX_RSP_REASON_INVPORT 0x22
#define IDX_RSP_REASON_INVPORT 0x22
/*005*/ BYTE resv005[3]; /* */
/*008*/ BYTE resp; /* Response code */
#define IDX_RSP_RESP_MASK 0x03
Expand Down

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