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Remove defective cmpxchg16() from Elbrus e2k support
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This removes the defective part as described in issue:
SDL-Hercules-390#474
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wrljet committed Feb 16, 2022
1 parent 1027093 commit bc14f42
Showing 1 changed file with 0 additions and 44 deletions.
44 changes: 0 additions & 44 deletions machdep.h
Original file line number Diff line number Diff line change
Expand Up @@ -552,50 +552,6 @@ inline int cmpxchg16_aarch64(U64 *old1, U64 *old2, U64 new1, U64 new2, volatile
#endif /* define(__aarch64__) */


/*-------------------------------------------------------------------
* Elbrus e2k
*-------------------------------------------------------------------*/
#if defined(__e2k__) && defined(__LCC__)

#ifndef cmpxchg16
#define cmpxchg16( x1, x2, y1, y2, z ) \
cmpxchg16_e2k( x1, x2, y1, y2, z )

static inline int cmpxchg16_e2k ( U64 *old1, U64 *old2,
U64 new1, U64 new2,
volatile void *ptr )
{
// returns 0 == success, 1 otherwise

static bool lock_flag;

int result;

__atomic_thread_fence(__ATOMIC_SEQ_CST);
while (__atomic_test_and_set(&lock_flag, __ATOMIC_ACQUIRE) == 1) ;

__asm volatile("" : : : "memory");

if (*old1 == *(U64*)ptr && *old2 == *((U64*)ptr + 1))
{
*(U64*)ptr = new1;
*((U64*)ptr + 1) = new2;
result = 0;
} else {
*old1 = *((U64*)ptr);
*old2 = *((U64*)ptr + 1);
result = 1;
}

__atomic_clear(&lock_flag, __ATOMIC_RELEASE);
__atomic_thread_fence(__ATOMIC_SEQ_CST);

return result;
}
#endif /* cmpxchg16 */

#endif /* defined(__e2k__) && defined(__LCC__) */

/*-------------------------------------------------------------------
* C11_ATOMICS_AVAILABLE
*-------------------------------------------------------------------*/
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