Add synthetic IntegerDivideByZero exception (esp8266#7496)

The ROM routine __divsi3 is called by code whenever a division is needed,
because there is no divide unit on the ESP8266 core.  When the divide
routine in ROM hits a div-by-zero case, it jumpt to an ILL(egal instruction)
at a fixed address which causes a HW exception 0 (IllegalInsnException).

In the postmortem dump, when an ILL exception is detected at this address
in ROM, convert it to a DivByZeroException for printout (6).

Divde by zero errors now print as follows:
````
--------------- CUT HERE FOR EXCEPTION DECODER ---------------
Exception (6):
epc1=0x4000dce5 epc2=0x00000000 epc3=0x00000000 excvaddr=0x00000000 depc=0x00000000

>>>stack>>>
...
<<<stack<<<
--------------- CUT HERE FOR EXCEPTION DECODER ---------------
````

And will decode as follows:
````
Exception 6: IntegerDivideByZero: QUOS, QUOU, REMS, or REMU divisor operand is zero
PC: 0x4000dce5
EXCVADDR: 0x00000000

Decoding stack results
...
````

cores/esp8266/core_esp8266_postmortem.cpp

@@ -144,8 +144,11 @@ void __wrap_system_restart_local() {
         ets_printf_P(PSTR("\nAbort called\n"));
     }
     else if (rst_info.reason == REASON_EXCEPTION_RST) {
+        // The GCC divide routine in ROM jumps to the address below and executes ILL (00 00 00) on div-by-zero
+        // In that case, print the exception as (6) which is IntegerDivZero
+        bool div_zero = (rst_info.exccause == 0) && (rst_info.epc1 == 0x4000dce5);
         ets_printf_P(PSTR("\nException (%d):\nepc1=0x%08x epc2=0x%08x epc3=0x%08x excvaddr=0x%08x depc=0x%08x\n"),
-            rst_info.exccause, rst_info.epc1, rst_info.epc2, rst_info.epc3, rst_info.excvaddr, rst_info.depc);
+            div_zero ? 6 : rst_info.exccause, rst_info.epc1, rst_info.epc2, rst_info.epc3, rst_info.excvaddr, rst_info.depc);
     }
     else if (rst_info.reason == REASON_SOFT_WDT_RST) {
         ets_printf_P(PSTR("\nSoft WDT reset\n"));