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Merge branch 'turbostat' of git://git.kernel.org/pub/scm/linux/kernel…
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…/git/lenb/linux

Pull changes related to turbostat for v4.11 from Len Brown.

* 'turbostat' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux: (44 commits)
  tools/power turbostat: version 17.02.24
  tools/power turbostat: bugfix: --add u32 was printed as u64
  tools/power turbostat: show error on exec
  tools/power turbostat: dump p-state software config
  tools/power turbostat: show package number, even without --debug
  tools/power turbostat: support "--hide C1" etc.
  tools/power turbostat: move --Package and --processor into the --cpu option
  tools/power turbostat: turbostat.8 update
  tools/power turbostat: update --list feature
  tools/power turbostat: use wide columns to display large numbers
  tools/power turbostat: Add --list option to show available header names
  tools/power turbostat: fix zero IRQ count shown in one-shot command mode
  tools/power turbostat: add --cpu parameter
  tools/power turbostat: print sysfs C-state stats
  tools/power turbostat: extend --add option to accept /sys path
  tools/power turbostat: skip unused counters on BDX
  tools/power turbostat: fix decoding for GLM, DNV, SKX turbo-ratio limits
  tools/power turbostat: skip unused counters on SKX
  tools/power turbostat: Denverton: use HW CC1 counter, skip C3, C7
  tools/power turbostat: initial Gemini Lake SOC support
  ...
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@rafaeljw
rafaeljw committed Mar 1, 2017
2 parents 02c3de1 + e3942ed commit 6bff9c6
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Showing 6 changed files with 1,570 additions and 596 deletions.
1 change: 1 addition & 0 deletions arch/x86/include/asm/intel-family.h
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Original file line number Diff line number Diff line change
Expand Up @@ -59,6 +59,7 @@
#define INTEL_FAM6_ATOM_MERRIFIELD 0x4A /* Tangier */
#define INTEL_FAM6_ATOM_MOOREFIELD 0x5A /* Anniedale */
#define INTEL_FAM6_ATOM_GOLDMONT 0x5C
#define INTEL_FAM6_ATOM_GEMINI_LAKE 0x7A
#define INTEL_FAM6_ATOM_DENVERTON 0x5F /* Goldmont Microserver */

/* Xeon Phi */
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11 changes: 10 additions & 1 deletion arch/x86/include/asm/msr-index.h
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Expand Up @@ -46,7 +46,7 @@
#define MSR_FSB_FREQ 0x000000cd
#define MSR_PLATFORM_INFO 0x000000ce

#define MSR_NHM_SNB_PKG_CST_CFG_CTL 0x000000e2
#define MSR_PKG_CST_CONFIG_CONTROL 0x000000e2
#define NHM_C3_AUTO_DEMOTE (1UL << 25)
#define NHM_C1_AUTO_DEMOTE (1UL << 26)
#define ATM_LNC_C6_AUTO_DEMOTE (1UL << 25)
Expand Down Expand Up @@ -147,6 +147,7 @@
/* C-state Residency Counters */
#define MSR_PKG_C3_RESIDENCY 0x000003f8
#define MSR_PKG_C6_RESIDENCY 0x000003f9
#define MSR_ATOM_PKG_C6_RESIDENCY 0x000003fa
#define MSR_PKG_C7_RESIDENCY 0x000003fa
#define MSR_CORE_C3_RESIDENCY 0x000003fc
#define MSR_CORE_C6_RESIDENCY 0x000003fd
Expand Down Expand Up @@ -203,10 +204,17 @@
#define MSR_PKG_BOTH_CORE_GFXE_C0_RES 0x0000065B

#define MSR_CORE_C1_RES 0x00000660
#define MSR_MODULE_C6_RES_MS 0x00000664

#define MSR_CC6_DEMOTION_POLICY_CONFIG 0x00000668
#define MSR_MC6_DEMOTION_POLICY_CONFIG 0x00000669

#define MSR_ATOM_CORE_RATIOS 0x0000066a
#define MSR_ATOM_CORE_VIDS 0x0000066b
#define MSR_ATOM_CORE_TURBO_RATIOS 0x0000066c
#define MSR_ATOM_CORE_TURBO_VIDS 0x0000066d


#define MSR_CORE_PERF_LIMIT_REASONS 0x00000690
#define MSR_GFX_PERF_LIMIT_REASONS 0x000006B0
#define MSR_RING_PERF_LIMIT_REASONS 0x000006B1
Expand Down Expand Up @@ -459,6 +467,7 @@

#define MSR_IA32_TEMPERATURE_TARGET 0x000001a2

#define MSR_MISC_FEATURE_CONTROL 0x000001a4
#define MSR_MISC_PWR_MGMT 0x000001aa

#define MSR_IA32_ENERGY_PERF_BIAS 0x000001b0
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15 changes: 5 additions & 10 deletions drivers/cpufreq/intel_pstate.c
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Original file line number Diff line number Diff line change
Expand Up @@ -39,11 +39,6 @@

#define INTEL_CPUFREQ_TRANSITION_LATENCY 20000

#define ATOM_RATIOS 0x66a
#define ATOM_VIDS 0x66b
#define ATOM_TURBO_RATIOS 0x66c
#define ATOM_TURBO_VIDS 0x66d

#ifdef CONFIG_ACPI
#include <acpi/processor.h>
#include <acpi/cppc_acpi.h>
Expand Down Expand Up @@ -1367,23 +1362,23 @@ static int atom_get_min_pstate(void)
{
u64 value;

rdmsrl(ATOM_RATIOS, value);
rdmsrl(MSR_ATOM_CORE_RATIOS, value);
return (value >> 8) & 0x7F;
}

static int atom_get_max_pstate(void)
{
u64 value;

rdmsrl(ATOM_RATIOS, value);
rdmsrl(MSR_ATOM_CORE_RATIOS, value);
return (value >> 16) & 0x7F;
}

static int atom_get_turbo_pstate(void)
{
u64 value;

rdmsrl(ATOM_TURBO_RATIOS, value);
rdmsrl(MSR_ATOM_CORE_TURBO_RATIOS, value);
return value & 0x7F;
}

Expand Down Expand Up @@ -1445,15 +1440,15 @@ static void atom_get_vid(struct cpudata *cpudata)
{
u64 value;

rdmsrl(ATOM_VIDS, value);
rdmsrl(MSR_ATOM_CORE_VIDS, value);
cpudata->vid.min = int_tofp((value >> 8) & 0x7f);
cpudata->vid.max = int_tofp((value >> 16) & 0x7f);
cpudata->vid.ratio = div_fp(
cpudata->vid.max - cpudata->vid.min,
int_tofp(cpudata->pstate.max_pstate -
cpudata->pstate.min_pstate));

rdmsrl(ATOM_TURBO_VIDS, value);
rdmsrl(MSR_ATOM_CORE_TURBO_VIDS, value);
cpudata->vid.turbo = value & 0x7f;
}

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6 changes: 3 additions & 3 deletions drivers/idle/intel_idle.c
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Expand Up @@ -961,9 +961,9 @@ static void auto_demotion_disable(void)
{
unsigned long long msr_bits;

rdmsrl(MSR_NHM_SNB_PKG_CST_CFG_CTL, msr_bits);
rdmsrl(MSR_PKG_CST_CONFIG_CONTROL, msr_bits);
msr_bits &= ~(icpu->auto_demotion_disable_flags);
wrmsrl(MSR_NHM_SNB_PKG_CST_CFG_CTL, msr_bits);
wrmsrl(MSR_PKG_CST_CONFIG_CONTROL, msr_bits);
}
static void c1e_promotion_disable(void)
{
Expand Down Expand Up @@ -1273,7 +1273,7 @@ static void sklh_idle_state_table_update(void)
if ((mwait_substates & (0xF << 28)) == 0)
return;

rdmsrl(MSR_NHM_SNB_PKG_CST_CFG_CTL, msr);
rdmsrl(MSR_PKG_CST_CONFIG_CONTROL, msr);

/* PC10 is not enabled in PKG C-state limit */
if ((msr & 0xF) != 8)
Expand Down
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