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AArch64/ARM64: remove AArch64 from tree prior to renaming ARM64.
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I'm doing this in two phases for a better "git blame" record. This
commit removes the previous AArch64 backend and redirects all
functionality to ARM64. It also deduplicates test-lines and removes
orphaned AArch64 tests.

The next step will be "git mv ARM64 AArch64" and rewire most of the
tests.

Hopefully LLVM is still functional, though it would be even better if
no-one ever had to care because the rename happens straight
afterwards.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209576 91177308-0d34-0410-b5e6-96231b3b80d8
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TNorthover committed May 24, 2014
1 parent 4ca8b0b commit 9105f66
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Showing 355 changed files with 73 additions and 67,373 deletions.
3 changes: 1 addition & 2 deletions CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -127,7 +127,6 @@ set(LLVM_INCLUDE_DIR ${CMAKE_CURRENT_BINARY_DIR}/include)
set(LLVM_LIBDIR_SUFFIX "" CACHE STRING "Define suffix of library directory name (32/64)" )

set(LLVM_ALL_TARGETS
AArch64
ARM64
ARM
CppBackend
Expand All @@ -144,7 +143,7 @@ set(LLVM_ALL_TARGETS
)

# List of targets with JIT support:
set(LLVM_TARGETS_WITH_JIT X86 PowerPC AArch64 ARM64 ARM Mips SystemZ)
set(LLVM_TARGETS_WITH_JIT X86 PowerPC ARM64 ARM Mips SystemZ)

set(LLVM_TARGETS_TO_BUILD "all"
CACHE STRING "Semicolon-separated list of targets to build, or \"all\".")
Expand Down
13 changes: 6 additions & 7 deletions autoconf/configure.ac
Original file line number Diff line number Diff line change
Expand Up @@ -421,7 +421,7 @@ AC_CACHE_CHECK([target architecture],[llvm_cv_target_arch],
powerpc*-*) llvm_cv_target_arch="PowerPC" ;;
arm64*-*) llvm_cv_target_arch="ARM64" ;;
arm*-*) llvm_cv_target_arch="ARM" ;;
aarch64*-*) llvm_cv_target_arch="AArch64" ;;
aarch64*-*) llvm_cv_target_arch="ARM64" ;;
mips-* | mips64-*) llvm_cv_target_arch="Mips" ;;
mipsel-* | mips64el-*) llvm_cv_target_arch="Mips" ;;
xcore-*) llvm_cv_target_arch="XCore" ;;
Expand Down Expand Up @@ -457,7 +457,7 @@ case $host in
powerpc*-*) host_arch="PowerPC" ;;
arm64*-*) host_arch="ARM64" ;;
arm*-*) host_arch="ARM" ;;
aarch64*-*) host_arch="AArch64" ;;
aarch64*-*) host_arch="ARM64" ;;
mips-* | mips64-*) host_arch="Mips" ;;
mipsel-* | mips64el-*) host_arch="Mips" ;;
xcore-*) host_arch="XCore" ;;
Expand Down Expand Up @@ -786,7 +786,6 @@ else
PowerPC) AC_SUBST(TARGET_HAS_JIT,1) ;;
x86_64) AC_SUBST(TARGET_HAS_JIT,1) ;;
ARM) AC_SUBST(TARGET_HAS_JIT,1) ;;
AArch64) AC_SUBST(TARGET_HAS_JIT,0) ;;
Mips) AC_SUBST(TARGET_HAS_JIT,1) ;;
XCore) AC_SUBST(TARGET_HAS_JIT,0) ;;
MSP430) AC_SUBST(TARGET_HAS_JIT,0) ;;
Expand All @@ -797,7 +796,7 @@ else
esac
fi

TARGETS_WITH_JIT="AArch64 ARM ARM64 Mips PowerPC SystemZ X86"
TARGETS_WITH_JIT="ARM ARM64 Mips PowerPC SystemZ X86"
AC_SUBST(TARGETS_WITH_JIT,$TARGETS_WITH_JIT)

dnl Allow enablement of building and installing docs
Expand Down Expand Up @@ -950,7 +949,7 @@ if test "$llvm_cv_enable_crash_overrides" = "yes" ; then
fi

dnl List all possible targets
ALL_TARGETS="X86 Sparc PowerPC AArch64 ARM ARM64 Mips XCore MSP430 CppBackend NVPTX Hexagon SystemZ R600"
ALL_TARGETS="X86 Sparc PowerPC ARM ARM64 Mips XCore MSP430 CppBackend NVPTX Hexagon SystemZ R600"
AC_SUBST(ALL_TARGETS,$ALL_TARGETS)

dnl Allow specific targets to be specified for building (or not)
Expand All @@ -971,7 +970,7 @@ case "$enableval" in
x86_64) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
sparc) TARGETS_TO_BUILD="Sparc $TARGETS_TO_BUILD" ;;
powerpc) TARGETS_TO_BUILD="PowerPC $TARGETS_TO_BUILD" ;;
aarch64) TARGETS_TO_BUILD="AArch64 $TARGETS_TO_BUILD" ;;
aarch64) TARGETS_TO_BUILD="ARM64 $TARGETS_TO_BUILD" ;;
arm64) TARGETS_TO_BUILD="ARM64 $TARGETS_TO_BUILD" ;;
arm) TARGETS_TO_BUILD="ARM $TARGETS_TO_BUILD" ;;
mips) TARGETS_TO_BUILD="Mips $TARGETS_TO_BUILD" ;;
Expand All @@ -990,7 +989,7 @@ case "$enableval" in
x86_64) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
Sparc) TARGETS_TO_BUILD="Sparc $TARGETS_TO_BUILD" ;;
PowerPC) TARGETS_TO_BUILD="PowerPC $TARGETS_TO_BUILD" ;;
AArch64) TARGETS_TO_BUILD="AArch64 $TARGETS_TO_BUILD" ;;
AArch64) TARGETS_TO_BUILD="ARM64 $TARGETS_TO_BUILD" ;;
ARM) TARGETS_TO_BUILD="ARM $TARGETS_TO_BUILD" ;;
Mips) TARGETS_TO_BUILD="Mips $TARGETS_TO_BUILD" ;;
XCore) TARGETS_TO_BUILD="XCore $TARGETS_TO_BUILD" ;;
Expand Down
14 changes: 6 additions & 8 deletions configure
Original file line number Diff line number Diff line change
Expand Up @@ -4153,7 +4153,7 @@ else
powerpc*-*) llvm_cv_target_arch="PowerPC" ;;
arm64*-*) llvm_cv_target_arch="ARM64" ;;
arm*-*) llvm_cv_target_arch="ARM" ;;
aarch64*-*) llvm_cv_target_arch="AArch64" ;;
aarch64*-*) llvm_cv_target_arch="ARM64" ;;
mips-* | mips64-*) llvm_cv_target_arch="Mips" ;;
mipsel-* | mips64el-*) llvm_cv_target_arch="Mips" ;;
xcore-*) llvm_cv_target_arch="XCore" ;;
Expand Down Expand Up @@ -4190,7 +4190,7 @@ case $host in
powerpc*-*) host_arch="PowerPC" ;;
arm64*-*) host_arch="ARM64" ;;
arm*-*) host_arch="ARM" ;;
aarch64*-*) host_arch="AArch64" ;;
aarch64*-*) host_arch="ARM64" ;;
mips-* | mips64-*) host_arch="Mips" ;;
mipsel-* | mips64el-*) host_arch="Mips" ;;
xcore-*) host_arch="XCore" ;;
Expand Down Expand Up @@ -5102,8 +5102,6 @@ else
x86_64) TARGET_HAS_JIT=1
;;
ARM) TARGET_HAS_JIT=1
;;
AArch64) TARGET_HAS_JIT=0
;;
Mips) TARGET_HAS_JIT=1
;;
Expand All @@ -5122,7 +5120,7 @@ else
esac
fi

TARGETS_WITH_JIT="AArch64 ARM ARM64 Mips PowerPC SystemZ X86"
TARGETS_WITH_JIT="ARM ARM64 Mips PowerPC SystemZ X86"
TARGETS_WITH_JIT=$TARGETS_WITH_JIT


Expand Down Expand Up @@ -5359,7 +5357,7 @@ _ACEOF

fi

ALL_TARGETS="X86 Sparc PowerPC AArch64 ARM ARM64 Mips XCore MSP430 CppBackend NVPTX Hexagon SystemZ R600"
ALL_TARGETS="X86 Sparc PowerPC ARM ARM64 Mips XCore MSP430 CppBackend NVPTX Hexagon SystemZ R600"
ALL_TARGETS=$ALL_TARGETS


Expand All @@ -5382,7 +5380,7 @@ case "$enableval" in
x86_64) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
sparc) TARGETS_TO_BUILD="Sparc $TARGETS_TO_BUILD" ;;
powerpc) TARGETS_TO_BUILD="PowerPC $TARGETS_TO_BUILD" ;;
aarch64) TARGETS_TO_BUILD="AArch64 $TARGETS_TO_BUILD" ;;
aarch64) TARGETS_TO_BUILD="ARM64 $TARGETS_TO_BUILD" ;;
arm64) TARGETS_TO_BUILD="ARM64 $TARGETS_TO_BUILD" ;;
arm) TARGETS_TO_BUILD="ARM $TARGETS_TO_BUILD" ;;
mips) TARGETS_TO_BUILD="Mips $TARGETS_TO_BUILD" ;;
Expand All @@ -5401,7 +5399,7 @@ case "$enableval" in
x86_64) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
Sparc) TARGETS_TO_BUILD="Sparc $TARGETS_TO_BUILD" ;;
PowerPC) TARGETS_TO_BUILD="PowerPC $TARGETS_TO_BUILD" ;;
AArch64) TARGETS_TO_BUILD="AArch64 $TARGETS_TO_BUILD" ;;
AArch64) TARGETS_TO_BUILD="ARM64 $TARGETS_TO_BUILD" ;;
ARM) TARGETS_TO_BUILD="ARM $TARGETS_TO_BUILD" ;;
Mips) TARGETS_TO_BUILD="Mips $TARGETS_TO_BUILD" ;;
XCore) TARGETS_TO_BUILD="XCore $TARGETS_TO_BUILD" ;;
Expand Down
1 change: 0 additions & 1 deletion include/llvm/IR/Intrinsics.td
Original file line number Diff line number Diff line change
Expand Up @@ -534,7 +534,6 @@ include "llvm/IR/IntrinsicsPowerPC.td"
include "llvm/IR/IntrinsicsX86.td"
include "llvm/IR/IntrinsicsARM.td"
include "llvm/IR/IntrinsicsARM64.td"
include "llvm/IR/IntrinsicsAArch64.td"
include "llvm/IR/IntrinsicsXCore.td"
include "llvm/IR/IntrinsicsHexagon.td"
include "llvm/IR/IntrinsicsNVVM.td"
Expand Down
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