Added testcases to operator.vhd to have at least one testcase for eac…

…h operator
ldoolitt · Dec 4, 2017 · 197e4a0 · 197e4a0
1 parent b6cf317
commit 197e4a0
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Showing 2 changed files with 25 additions and 6 deletions.
diff --git a/examples/operators.vhd b/examples/operators.vhd
@@ -61,13 +61,24 @@ begin
             s_uns <= s_uns srl 9;
             s_sig <= shift_left(s_sig,2);
             s_sig <= shift_right(s_sig,to_integer(s_sig));
-            -- s_uns <= s_uns ror 3; -- Not yet implemented
-            -- s_uns <= s_uns rol to_integer(s_uns); -- Not yet implemented
-            -- s_uns <= rotate_right(s_uns,3); -- Not yet implemented
+            -- s_uns <= s_uns ror 3;                          -- Not yet implemented
+            -- s_uns <= s_uns rol to_integer(s_uns);          -- Not yet implemented
+            -- s_uns <= rotate_right(s_uns,3);                -- Not yet implemented
             -- s_uns <= rotate_left(s_uns,to_integer(s_uns)); -- Not yet implemented
             s_sig <= s_sig rem s_int;
             s_sig <= s_sig mod s_int;
          end if;
+         if
+            s_sig = signed(s_uns) or unsigned(s_sig) /= s_uns or s_sig < "101010101" or
+            s_sig <= signed(s_uns) or unsigned(s_sig) > s_uns or s_sig >= "00000101"
+         then
+            s_sig <= s_sig + s_sig;
+            s_sig <= s_sig - s_sig;
+            s_sig <= s_sig * s_sig;
+            s_sig <= s_sig / s_sig;
+            s_sig <= s_sig(7 downto 4) & "10" & signed(s_uns(1 downto 0));
+            s_int <= 2 ** 3;
+         end if;
       end if;
    end process test_i;
 

diff --git a/translated_examples/operators.v b/translated_examples/operators.v
@@ -49,13 +49,21 @@ reg [7:0] s_uns;
       s_uns <= s_uns >> 9;
       s_sig <= s_sig << 2;
       s_sig <= s_sig >> (s_sig);
-      // s_uns <= s_uns ror 3; -- Not yet implemented
-      // s_uns <= s_uns rol to_integer(s_uns); -- Not yet implemented
-      // s_uns <= rotate_right(s_uns,3); -- Not yet implemented
+      // s_uns <= s_uns ror 3;                          -- Not yet implemented
+      // s_uns <= s_uns rol to_integer(s_uns);          -- Not yet implemented
+      // s_uns <= rotate_right(s_uns,3);                -- Not yet implemented
       // s_uns <= rotate_left(s_uns,to_integer(s_uns)); -- Not yet implemented
       s_sig <= s_sig % s_int;
       s_sig <= s_sig % s_int;
     end
+    if(s_sig == (s_uns) || (s_sig) != s_uns || s_sig < 9'b101010101 || s_sig <= (s_uns) || (s_sig) > s_uns || s_sig >= 8'b00000101) begin
+      s_sig <= s_sig + s_sig;
+      s_sig <= s_sig - s_sig;
+      s_sig <= s_sig * s_sig;
+      s_sig <= s_sig / s_sig;
+      s_sig <= {s_sig[7:4],2'b10,s_uns[1:0]};
+      s_int <= 2 ** 3;
+    end
   end