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add some AMD info
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[email protected] committed May 10, 2013
1 parent 4b2f0b6 commit 1a8937f
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Showing 5 changed files with 304 additions and 9 deletions.
11 changes: 7 additions & 4 deletions dbvm/vmm/common.h
Original file line number Diff line number Diff line change
Expand Up @@ -2,15 +2,18 @@
#define COMMON_H_


#ifndef SERIALPORT
#define SERIALPORT 0
#endif

#ifndef VMMSIZE
#define VMMSIZE 0
#define SERIALPORT 0
#endif

//#define DEBUG //comment for release
//#define DEBUGINTHANDLER //comment for release
#define DEBUG //comment for release
#define DEBUGINTHANDLER //comment for release

//#define DISPLAYDEBUG //send serialport debug output to the display
// #define DISPLAYDEBUG //send serialport debug output to the display
#define ULTIMAPDEBUG //for debugging ultimap (I seem to have misplaced my serial port...)


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2 changes: 2 additions & 0 deletions dbvm/vmm/config.h
Original file line number Diff line number Diff line change
Expand Up @@ -13,6 +13,8 @@ This library is licensed under the BSD license. See the file COPYING.
#define DISTORM_VER 0x01071e
#define SUPPORT_64BIT_OFFSET 1

#define DARKBYTESFUCKEDUPCROSSCOMPILER 1

#ifdef DARKBYTESFUCKEDUPCROSSCOMPILER
typedef signed char int8_t;
typedef short int int16_t;
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78 changes: 73 additions & 5 deletions dbvm/vmm/main.c
Original file line number Diff line number Diff line change
Expand Up @@ -2157,8 +2157,76 @@ void startvmx(pcpuinfo currentcpuinfo)
{
sendstring("AMD virtualization handling\n\r");

sendstring("Not handled yet...\n\r");
displayline("AMD system detected. Can not continue\n");


UINT64 a=0x80000001;
UINT64 b,c,d;

_cpuid(&a,&b,&c,&d);

if (c & (1<<2)) //SVM bit in cpuid
{
sendstring("SVM supported\n");

a=0x8000000a;
_cpuid(&a,&b,&c,&d);

sendstringf("cpuid: 0x8000000a:\n");
sendstringf("EAX=%8\n", a);
sendstringf("EBX=%8\n", b);
sendstringf("ECX=%8\n", c);
sendstringf("EDX=%8\n", d);

UINT64 VM_CR=readMSR(0xc0010114); //VM_CR MSR
sendstringf("VM_CR=%6\n", VM_CR);

if ((VM_CR & (1<<4))==0)
{
UINT64 efer;
sendstring("SVM is available\n");

sendstring("Setting SVME bit in EFER\n");

efer=readMSR(EFER_MSR);

sendstringf("EFER was %6\n", efer);
efer=efer | (1 << 12);
sendstringf("EFER will become %6\n", efer);


writeMSR(EFER_MSR, efer);


currentcpuinfo->vmcb=malloc(4096);
zeromemory(currentcpuinfo->vmcb, 4096);


//setupVMX(currentcpuinfo);


if (!isAP)
clearScreen();

}
else
{
sendstring("SVM has been disabled\n");
}


}
else
{
sendstring("This cpu does not support SVM\n");
sendstringf("cpuid: 0x80000001:\n");
sendstringf("EAX=%8\n", a);
sendstringf("EBX=%8\n", b);
sendstringf("ECX=%8\n", c);
sendstringf("EDX=%8\n", d);

}



}
else
Expand Down Expand Up @@ -2247,9 +2315,9 @@ void startvmx(pcpuinfo currentcpuinfo)

displayline("%d:Checks successfull. Going to call vmxon\n",currentcpuinfo->cpunr);

if (vmxon(VirtualToPhysical((UINT64)currentcpuinfo->vmxon_region))==0)
{
sendstring("vmxon success\n\r");
if (vmxon(VirtualToPhysical((UINT64)currentcpuinfo->vmxon_region))==0)
{
sendstring("vmxon success\n\r");
displayline("%d: vmxon success\n",currentcpuinfo->cpunr);

displayline("%d: calling vmclear\n",currentcpuinfo->cpunr);
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1 change: 1 addition & 0 deletions dbvm/vmm/msrnames.h
Original file line number Diff line number Diff line change
Expand Up @@ -24,6 +24,7 @@
#define IA32_VMX_CR4_FIXED1_MSR 0x489

#define IA32_DS_AREA 0x600
#define EFER_MSR 0xc0000080

#define IA32_FS_BASE_MSR 0xc0000100
#define IA32_GS_BASE_MSR 0xc0000101
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221 changes: 221 additions & 0 deletions dbvm/vmm/vmmhelper.h
Original file line number Diff line number Diff line change
Expand Up @@ -106,6 +106,225 @@ int vmstates_pos;

#endif

typedef volatile struct _vmcb
{
WORD InterceptCR0_15Read;
WORD InterceptCR0_15Write;
WORD InterceptDR0_15Read;
WORD InterceptDR0_15Write;
DWORD InterceptExceptions;
union{
DWORD InstructionIntercept1;
struct {
unsigned InterceptINTR :1;
unsigned InterceptNMI :1;
unsigned InterceptSMI :1;
unsigned InterceptINIT :1;
unsigned InterceptVINTR :1;
unsigned InterceptCR0WritesThatChangeTSorMP :1;
unsigned InterceptIDTRRead :1;
unsigned InterceptGDTRRead :1;
unsigned InterceptLDTRRead :1;
unsigned InterceptTRRead :1;
unsigned InterceptIDTRWrite :1;
unsigned InterceptGDTRWrite :1;
unsigned InterceptLDTRWrite :1;
unsigned InterceptTRWrite :1;
unsigned InterceptRDTSC :1;
unsigned InterceptRDPMC :1;

unsigned InterceptPUSHF :1;
unsigned InterceptPOPF :1;
unsigned InterceptCPUID :1;
unsigned InterceptRSM :1;
unsigned InterceptIRET :1;
unsigned InterceptINT :1;
unsigned InterceptINVD :1;
unsigned InterceptPAUSE :1;
unsigned InterceptHLT :1;
unsigned InterceptINVLPG :1;
unsigned InterceptINVLPGA :1;
unsigned IOIO_PROT :1;
unsigned MSR_PROT :1;
unsigned InterceptTaskSwitches :1;
unsigned FERR_FREEZE :1;
unsigned InterceptShutdown :1;

};
};

union{
DWORD InstructionIntercept2;
struct {
unsigned InterceptVMRUN :1;
unsigned InterceptVMMCAL :1;
unsigned InterceptVMLOAD :1;
unsigned InterceptVMSAVE :1;
unsigned InterceptSTGI :1;
unsigned InterceptCLGI :1;
unsigned InterceptSKINIT :1;
unsigned InterceptRDTSCP :1;
unsigned InterceptICEBP :1;
unsigned InterceptWBINVD :1;
unsigned InterceptMONITOR :1;
unsigned InterceptMWAIT :1;
unsigned InterceptMWAIT_IfArmed :1;
unsigned InterceptXSETBV :1;
};
};

DWORD reserved1[10];
WORD PauseFilterThreshold;
WORD PauseFilterCount;
QWORD IOPM_BASE_PA; //physical base address of IOPM
QWORD MSRPM_BASE_PA;
QWORD TSC_OFFSET;
DWORD GuestASID;
BYTE TLB_CONTROL;
BYTE reserved2[3];
BYTE V_TPR;
unsigned V_IRQ : 1;
unsigned reserved4: 7;
unsigned V_INTR_PRIO: 4;
unsigned V_IGN_TPR: 1;
unsigned reserved5: 3;
unsigned V_INTR_MASKING : 1;
unsigned reserved6: 7;
BYTE V_INTR_VECTOR;


union{
QWORD InterruptShadow;
struct {
unsigned INTERRUPT_SHADOW :1;
};
};

QWORD EXITCODE;
QWORD EXITINFO1;
QWORD EXITINFO2;
QWORD EXITINTINFO;

union{
QWORD Enable_Nested_Paging;
struct {
unsigned NP_ENABLE :1;
};
};

BYTE reserved7[0x20];

//a8
QWORD EVENTINJ;
QWORD N_CR3;

union{
QWORD Enable_LBR_Virtualization;
struct {
unsigned LBR_VIRTUALIZATION_ENABLE: 1;
};
};
DWORD VMCB_CLEAN_BITS;
DWORD reserved8;

QWORD nRIP;
BYTE NumberOfBytesFetched;
BYTE GuestInstructionBytes[15];
//E0
BYTE reserved9[800];

//400:
//State Save Area
WORD es_selector;
WORD es_attrib;
DWORD es_limit;
QWORD es_base;

WORD cs_selector;
WORD cs_attrib;
DWORD cs_limit;
QWORD cs_base;

WORD ss_selector;
WORD ss_attrib;
DWORD ss_limit;
QWORD ss_base;

WORD ds_selector;
WORD ds_attrib;
DWORD ds_limit;
QWORD ds_base;

WORD fs_selector;
WORD fs_attrib;
DWORD fs_limit;
QWORD fs_base;

WORD gs_selector;
WORD gs_attrib;
DWORD gs_limit;
QWORD gs_base;

WORD gdtr_selector;
WORD gdtr_attrib;
DWORD gdtr_limit;
QWORD gdtr_base;

WORD ldtr_selector;
WORD ldtr_attrib;
DWORD ldtr_limit;
QWORD ldtr_base;

WORD idtr_selector;
WORD idtr_attrib;
DWORD idtr_limit;
QWORD idtr_base;

WORD tr_selector;
WORD tr_attrib;
DWORD tr_limit;
QWORD tr_base;

BYTE reserved10[43];
BYTE CPL;
DWORD reserved11;
QWORD EFER;

BYTE reserved12[112];
QWORD CR4;
QWORD CR3;
QWORD CR0;
QWORD DR7;
QWORD DR6;
QWORD RFLAGS;
QWORD RIP; //0x578

BYTE reserved13[88];
QWORD RSP;

BYTE reserved14[24];
QWORD RAX;
QWORD STAR;
QWORD LSTAR;
QWORD CSTAR;
QWORD SFMASK;
QWORD KernelGsBase;
QWORD SYSENTER_CS;
QWORD SYSENTER_ESP;
QWORD SYSENTER_EIP;
QWORD CR2;

BYTE reserved15[32];
QWORD G_PAT;
QWORD DBGCTL;
QWORD BR_FROM;
QWORD BR_TO;
QWORD LASTEXCPFROM;
QWORD LASTEXCPTO; //290


} __attribute__((__packed__)) vmcb, *pvmcb;

typedef volatile struct _cpuinfo
{
DWORD active;
Expand Down Expand Up @@ -143,6 +362,8 @@ typedef volatile struct _cpuinfo
unsigned long long efer;


void* vmcb; //AMD's virtual machine control_block. Give the physical address of this to VMRUN

void* vmxon_region;
void* vmcs_region;

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