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cpu

A 32-bit RISC-V emulator

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TODO

  • Implement rv32i and Zicsr
  • Implement rv32m extension
  • Implement rv32f extension
  • Implement rv32c extension
  • Implement other CSRs and privilege modes
  • Add buttons
    • Open file
    • Start
    • Stop
    • Restart
    • Step over
    • Step into
    • Step out
  • Fix rv32f (some operations are currently implementation defined, works on msvc and gcc but not clang)
  • Pipelining

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A 32-bit RISC-V emulator

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