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Change memcpy/memset/memmove to have dest and source alignments.
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Note, this was reviewed (and more details are in) http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20151109/312083.html

These intrinsics currently have an explicit alignment argument which is
required to be a constant integer.  It represents the alignment of the
source and dest, and so must be the minimum of those.

This change allows source and dest to each have their own alignments
by using the alignment attribute on their arguments.  The alignment
argument itself is removed.

There are a few places in the code for which the code needs to be
checked by an expert as to whether using only src/dest alignment is
safe.  For those places, they currently take the minimum of src/dest
alignments which matches the current behaviour.

For example, code which used to read:
  call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 500, i32 8, i1 false)
will now read:
  call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 %dest, i8* align 8 %src, i32 500, i1 false)

For out of tree owners, I was able to strip alignment from calls using sed by replacing:
  (call.*llvm\.memset.*)i32\ [0-9]*\,\ i1 false\)
with:
  $1i1 false)

and similarly for memmove and memcpy.

I then added back in alignment to test cases which needed it.

A similar commit will be made to clang which actually has many differences in alignment as now
IRBuilder can generate different source/dest alignments on calls.

In IRBuilder itself, a new argument was added.  Instead of calling:
  CreateMemCpy(Dst, Src, getInt64(Size), DstAlign, /* isVolatile */ false)
you now call
  CreateMemCpy(Dst, Src, getInt64(Size), DstAlign, SrcAlign, /* isVolatile */ false)

There is a temporary class (IntegerAlignment) which takes the source alignment and rejects
implicit conversion from bool.  This is to prevent isVolatile here from passing its default
parameter to the source alignment.

Note, changes in future can now be made to codegen.  I didn't change anything here, but this
change should enable better memcpy code sequences.

Reviewed by Hal Finkel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253511 91177308-0d34-0410-b5e6-96231b3b80d8
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cooperp committed Nov 18, 2015
1 parent c4bfc2d commit 8b170f7
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Showing 294 changed files with 1,820 additions and 1,653 deletions.
45 changes: 35 additions & 10 deletions include/llvm/IR/IRBuilder.h
Original file line number Diff line number Diff line change
Expand Up @@ -362,34 +362,56 @@ class IRBuilderBase {
/// If the pointer isn't an i8*, it will be converted. If a TBAA tag is
/// specified, it will be added to the instruction. Likewise with alias.scope
/// and noalias tags.
CallInst *CreateMemSet(Value *Ptr, Value *Val, uint64_t Size, unsigned Align,
CallInst *CreateMemSet(Value *Ptr, Value *Val, uint64_t Size,
unsigned DstAlign,
bool isVolatile = false, MDNode *TBAATag = nullptr,
MDNode *ScopeTag = nullptr,
MDNode *NoAliasTag = nullptr) {
return CreateMemSet(Ptr, Val, getInt64(Size), Align, isVolatile,
return CreateMemSet(Ptr, Val, getInt64(Size), DstAlign, isVolatile,
TBAATag, ScopeTag, NoAliasTag);
}

CallInst *CreateMemSet(Value *Ptr, Value *Val, Value *Size, unsigned Align,
CallInst *CreateMemSet(Value *Ptr, Value *Val, Value *Size, unsigned DstAlign,
bool isVolatile = false, MDNode *TBAATag = nullptr,
MDNode *ScopeTag = nullptr,
MDNode *NoAliasTag = nullptr);

/// \brief Create and insert a memcpy between the specified pointers.
/// Create and insert a memcpy between the specified pointers.
///
/// If the pointers aren't i8*, they will be converted. If a TBAA tag is
/// specified, it will be added to the instruction. Likewise with alias.scope
/// and noalias tags.
CallInst *CreateMemCpy(Value *Dst, Value *Src, uint64_t Size, unsigned Align,
///
/// Note! This is very temporary. It is only intended to catch calls to
/// CreateMemCpy in out of tree code which would otherwise silently pass the
/// volatile flag to source alignment.
class IntegerAlignment {
private:
uint64_t Align;

IntegerAlignment() = delete;
IntegerAlignment(bool) = delete;
public:
IntegerAlignment(int Align) : Align(Align) { }
IntegerAlignment(long long Align) : Align(Align) { }
IntegerAlignment(unsigned Align) : Align(Align) { }
IntegerAlignment(uint64_t Align) : Align(Align) { }

operator unsigned() { return Align; }
};
CallInst *CreateMemCpy(Value *Dst, Value *Src, uint64_t Size,
unsigned DstAlign, IntegerAlignment SrcAlign,
bool isVolatile = false, MDNode *TBAATag = nullptr,
MDNode *TBAAStructTag = nullptr,
MDNode *ScopeTag = nullptr,
MDNode *NoAliasTag = nullptr) {
return CreateMemCpy(Dst, Src, getInt64(Size), Align, isVolatile, TBAATag,
return CreateMemCpy(Dst, Src, getInt64(Size), DstAlign, SrcAlign,
isVolatile, TBAATag,
TBAAStructTag, ScopeTag, NoAliasTag);
}

CallInst *CreateMemCpy(Value *Dst, Value *Src, Value *Size, unsigned Align,
CallInst *CreateMemCpy(Value *Dst, Value *Src, Value *Size,
unsigned DstAlign, IntegerAlignment SrcAlign,
bool isVolatile = false, MDNode *TBAATag = nullptr,
MDNode *TBAAStructTag = nullptr,
MDNode *ScopeTag = nullptr,
Expand All @@ -401,15 +423,18 @@ class IRBuilderBase {
/// If the pointers aren't i8*, they will be converted. If a TBAA tag is
/// specified, it will be added to the instruction. Likewise with alias.scope
/// and noalias tags.
CallInst *CreateMemMove(Value *Dst, Value *Src, uint64_t Size, unsigned Align,
CallInst *CreateMemMove(Value *Dst, Value *Src, uint64_t Size,
unsigned DstAlign, IntegerAlignment SrcAlign,
bool isVolatile = false, MDNode *TBAATag = nullptr,
MDNode *ScopeTag = nullptr,
MDNode *NoAliasTag = nullptr) {
return CreateMemMove(Dst, Src, getInt64(Size), Align, isVolatile,
return CreateMemMove(Dst, Src, getInt64(Size), DstAlign, SrcAlign,
isVolatile,
TBAATag, ScopeTag, NoAliasTag);
}

CallInst *CreateMemMove(Value *Dst, Value *Src, Value *Size, unsigned Align,
CallInst *CreateMemMove(Value *Dst, Value *Src, Value *Size,
unsigned DstAlign, IntegerAlignment SrcAlign,
bool isVolatile = false, MDNode *TBAATag = nullptr,
MDNode *ScopeTag = nullptr,
MDNode *NoAliasTag = nullptr);
Expand Down
17 changes: 17 additions & 0 deletions include/llvm/IR/Instructions.h
Original file line number Diff line number Diff line change
Expand Up @@ -1638,6 +1638,23 @@ class CallInst : public Instruction,
return AttributeList.getParamAlignment(i);
}

/// Set the alignment for a call or parameter (0=unknown).
void setParamAlignment(unsigned Index, unsigned Align) {
// Its not valid to change the parameter alignment. Instead we have to
// remove the old one if its there, and add a new one.
if (AttributeList.hasAttribute(Index, Attribute::Alignment))
AttributeList = AttributeList.removeAttribute(getContext(),
Index,
Attribute::Alignment);

// Now add the new alignment.
llvm::AttrBuilder B;
B.addAlignmentAttr(Align);
AttributeList = AttributeList.addAttributes(getContext(), Index,
AttributeSet::get(getContext(),
Index, B));
}

/// \brief Extract the number of dereferenceable bytes for a call or
/// parameter (0=unknown).
uint64_t getDereferenceableBytes(unsigned i) const {
Expand Down
32 changes: 18 additions & 14 deletions include/llvm/IR/IntrinsicInst.h
Original file line number Diff line number Diff line change
Expand Up @@ -150,16 +150,13 @@ namespace llvm {
const Use &getLengthUse() const { return getArgOperandUse(2); }
Use &getLengthUse() { return getArgOperandUse(2); }

ConstantInt *getAlignmentCst() const {
return cast<ConstantInt>(const_cast<Value*>(getArgOperand(3)));
}

unsigned getAlignment() const {
return getAlignmentCst()->getZExtValue();
unsigned getDestAlignment() const {
// Note, param attributes start at 1, so offset dest index from 0 to 1.
return getParamAlignment(1);
}

ConstantInt *getVolatileCst() const {
return cast<ConstantInt>(const_cast<Value*>(getArgOperand(4)));
return cast<ConstantInt>(const_cast<Value*>(getArgOperand(3)));
}
bool isVolatile() const {
return !getVolatileCst()->isZero();
Expand Down Expand Up @@ -188,16 +185,13 @@ namespace llvm {
setArgOperand(2, L);
}

void setAlignment(Constant* A) {
setArgOperand(3, A);
void setDestAlignment(unsigned Align) {
// Note, param attributes start at 1, so offset dest index from 0 to 1.
setParamAlignment(1, Align);
}

void setVolatile(Constant* V) {
setArgOperand(4, V);
}

Type *getAlignmentType() const {
return getArgOperand(3)->getType();
setArgOperand(3, V);
}

// Methods for support type inquiry through isa, cast, and dyn_cast:
Expand Down Expand Up @@ -259,12 +253,22 @@ namespace llvm {
return cast<PointerType>(getRawSource()->getType())->getAddressSpace();
}

unsigned getSrcAlignment() const {
// Note, param attributes start at 1, so offset src index from 1 to 2.
return getParamAlignment(2);
}

void setSource(Value *Ptr) {
assert(getRawSource()->getType() == Ptr->getType() &&
"setSource called with pointer of wrong type!");
setArgOperand(1, Ptr);
}

void setSrcAlignment(unsigned Align) {
// Note, param attributes start at 1, so offset src index from 1 to 2.
setParamAlignment(2, Align);
}

// Methods for support type inquiry through isa, cast, and dyn_cast:
static inline bool classof(const IntrinsicInst *I) {
return I->getIntrinsicID() == Intrinsic::memcpy ||
Expand Down
6 changes: 3 additions & 3 deletions include/llvm/IR/Intrinsics.td
Original file line number Diff line number Diff line change
Expand Up @@ -333,17 +333,17 @@ def int_instrprof_value_profile : Intrinsic<[],

def int_memcpy : Intrinsic<[],
[llvm_anyptr_ty, llvm_anyptr_ty, llvm_anyint_ty,
llvm_i32_ty, llvm_i1_ty],
llvm_i1_ty],
[IntrReadWriteArgMem, NoCapture<0>, NoCapture<1>,
ReadOnly<1>]>;
def int_memmove : Intrinsic<[],
[llvm_anyptr_ty, llvm_anyptr_ty, llvm_anyint_ty,
llvm_i32_ty, llvm_i1_ty],
llvm_i1_ty],
[IntrReadWriteArgMem, NoCapture<0>, NoCapture<1>,
ReadOnly<1>]>;
def int_memset : Intrinsic<[],
[llvm_anyptr_ty, llvm_i8_ty, llvm_anyint_ty,
llvm_i32_ty, llvm_i1_ty],
llvm_i1_ty],
[IntrReadWriteArgMem, NoCapture<0>]>;

let Properties = [IntrNoMem] in {
Expand Down
10 changes: 5 additions & 5 deletions lib/Analysis/Lint.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -284,9 +284,9 @@ void Lint::visitCallSite(CallSite CS) {
MemCpyInst *MCI = cast<MemCpyInst>(&I);
// TODO: If the size is known, use it.
visitMemoryReference(I, MCI->getDest(), MemoryLocation::UnknownSize,
MCI->getAlignment(), nullptr, MemRef::Write);
MCI->getDestAlignment(), nullptr, MemRef::Write);
visitMemoryReference(I, MCI->getSource(), MemoryLocation::UnknownSize,
MCI->getAlignment(), nullptr, MemRef::Read);
MCI->getSrcAlignment(), nullptr, MemRef::Read);

// Check that the memcpy arguments don't overlap. The AliasAnalysis API
// isn't expressive enough for what we really want to do. Known partial
Expand All @@ -306,16 +306,16 @@ void Lint::visitCallSite(CallSite CS) {
MemMoveInst *MMI = cast<MemMoveInst>(&I);
// TODO: If the size is known, use it.
visitMemoryReference(I, MMI->getDest(), MemoryLocation::UnknownSize,
MMI->getAlignment(), nullptr, MemRef::Write);
MMI->getDestAlignment(), nullptr, MemRef::Write);
visitMemoryReference(I, MMI->getSource(), MemoryLocation::UnknownSize,
MMI->getAlignment(), nullptr, MemRef::Read);
MMI->getSrcAlignment(), nullptr, MemRef::Read);
break;
}
case Intrinsic::memset: {
MemSetInst *MSI = cast<MemSetInst>(&I);
// TODO: If the size is known, use it.
visitMemoryReference(I, MSI->getDest(), MemoryLocation::UnknownSize,
MSI->getAlignment(), nullptr, MemRef::Write);
MSI->getDestAlignment(), nullptr, MemRef::Write);
break;
}

Expand Down
4 changes: 2 additions & 2 deletions lib/CodeGen/CodeGenPrepare.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1665,8 +1665,8 @@ bool CodeGenPrepare::optimizeCallInst(CallInst *CI, bool& ModifiedDT) {
unsigned Align = getKnownAlignment(MI->getDest(), *DL);
if (MemTransferInst *MTI = dyn_cast<MemTransferInst>(MI))
Align = std::min(Align, getKnownAlignment(MTI->getSource(), *DL));
if (Align > MI->getAlignment())
MI->setAlignment(ConstantInt::get(MI->getAlignmentType(), Align));
if (Align > MI->getDestAlignment())
MI->setDestAlignment(Align);
}
}

Expand Down
64 changes: 34 additions & 30 deletions lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -4365,69 +4365,73 @@ SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I, unsigned Intrinsic) {
case Intrinsic::longjmp:
return &"_longjmp"[!TLI.usesUnderscoreLongJmp()];
case Intrinsic::memcpy: {
const MemCpyInst &MemCpyI = cast<MemCpyInst>(I);
// FIXME: this definition of "user defined address space" is x86-specific
// Assert for address < 256 since we support only user defined address
// spaces.
assert(cast<PointerType>(I.getArgOperand(0)->getType())->getAddressSpace()
< 256 &&
cast<PointerType>(I.getArgOperand(1)->getType())->getAddressSpace()
< 256 &&
assert(MemCpyI.getDestAddressSpace() < 256 &&
MemCpyI.getSourceAddressSpace() < 256 &&
"Unknown address space");
SDValue Op1 = getValue(I.getArgOperand(0));
SDValue Op2 = getValue(I.getArgOperand(1));
SDValue Op3 = getValue(I.getArgOperand(2));
unsigned Align = cast<ConstantInt>(I.getArgOperand(3))->getZExtValue();
SDValue Op1 = getValue(MemCpyI.getDest());
SDValue Op2 = getValue(MemCpyI.getSource());
SDValue Op3 = getValue(MemCpyI.getLength());
// FIXME: Support passing different dest/src alignments to the memcpy
// DAG node.
unsigned Align = std::min(MemCpyI.getDestAlignment(),
MemCpyI.getSrcAlignment());
if (!Align)
Align = 1; // @llvm.memcpy defines 0 and 1 to both mean no alignment.
bool isVol = cast<ConstantInt>(I.getArgOperand(4))->getZExtValue();
bool isVol = MemCpyI.isVolatile();
bool isTC = I.isTailCall() && isInTailCallPosition(&I, DAG.getTarget());
SDValue MC = DAG.getMemcpy(getRoot(), sdl, Op1, Op2, Op3, Align, isVol,
false, isTC,
MachinePointerInfo(I.getArgOperand(0)),
MachinePointerInfo(I.getArgOperand(1)));
MachinePointerInfo(MemCpyI.getDest()),
MachinePointerInfo(MemCpyI.getSource()));
updateDAGForMaybeTailCall(MC);
return nullptr;
}
case Intrinsic::memset: {
const MemSetInst &MemSetI = cast<MemSetInst>(I);
// FIXME: this definition of "user defined address space" is x86-specific
// Assert for address < 256 since we support only user defined address
// spaces.
assert(cast<PointerType>(I.getArgOperand(0)->getType())->getAddressSpace()
< 256 &&
assert(MemSetI.getDestAddressSpace() < 256 &&
"Unknown address space");
SDValue Op1 = getValue(I.getArgOperand(0));
SDValue Op2 = getValue(I.getArgOperand(1));
SDValue Op3 = getValue(I.getArgOperand(2));
unsigned Align = cast<ConstantInt>(I.getArgOperand(3))->getZExtValue();
SDValue Op1 = getValue(MemSetI.getDest());
SDValue Op2 = getValue(MemSetI.getValue());
SDValue Op3 = getValue(MemSetI.getLength());
unsigned Align = MemSetI.getDestAlignment();
if (!Align)
Align = 1; // @llvm.memset defines 0 and 1 to both mean no alignment.
bool isVol = cast<ConstantInt>(I.getArgOperand(4))->getZExtValue();
bool isVol = MemSetI.isVolatile();
bool isTC = I.isTailCall() && isInTailCallPosition(&I, DAG.getTarget());
SDValue MS = DAG.getMemset(getRoot(), sdl, Op1, Op2, Op3, Align, isVol,
isTC, MachinePointerInfo(I.getArgOperand(0)));
isTC, MachinePointerInfo(MemSetI.getDest()));
updateDAGForMaybeTailCall(MS);
return nullptr;
}
case Intrinsic::memmove: {
const MemMoveInst &MemMoveI = cast<MemMoveInst>(I);
// FIXME: this definition of "user defined address space" is x86-specific
// Assert for address < 256 since we support only user defined address
// spaces.
assert(cast<PointerType>(I.getArgOperand(0)->getType())->getAddressSpace()
< 256 &&
cast<PointerType>(I.getArgOperand(1)->getType())->getAddressSpace()
< 256 &&
assert(MemMoveI.getDestAddressSpace() < 256 &&
MemMoveI.getSourceAddressSpace() < 256 &&
"Unknown address space");
SDValue Op1 = getValue(I.getArgOperand(0));
SDValue Op2 = getValue(I.getArgOperand(1));
SDValue Op3 = getValue(I.getArgOperand(2));
unsigned Align = cast<ConstantInt>(I.getArgOperand(3))->getZExtValue();
SDValue Op1 = getValue(MemMoveI.getDest());
SDValue Op2 = getValue(MemMoveI.getSource());
SDValue Op3 = getValue(MemMoveI.getLength());
// FIXME: Support passing different dest/src alignments to the memcpy
// DAG node.
unsigned Align = std::min(MemMoveI.getDestAlignment(),
MemMoveI.getSrcAlignment());
if (!Align)
Align = 1; // @llvm.memmove defines 0 and 1 to both mean no alignment.
bool isVol = cast<ConstantInt>(I.getArgOperand(4))->getZExtValue();
bool isVol = MemMoveI.isVolatile();
bool isTC = I.isTailCall() && isInTailCallPosition(&I, DAG.getTarget());
SDValue MM = DAG.getMemmove(getRoot(), sdl, Op1, Op2, Op3, Align, isVol,
isTC, MachinePointerInfo(I.getArgOperand(0)),
MachinePointerInfo(I.getArgOperand(1)));
isTC, MachinePointerInfo(MemMoveI.getDest()),
MachinePointerInfo(MemMoveI.getSource()));
updateDAGForMaybeTailCall(MM);
return nullptr;
}
Expand Down
5 changes: 0 additions & 5 deletions lib/IR/Attributes.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -830,11 +830,6 @@ AttributeSet AttributeSet::removeAttributes(LLVMContext &C, unsigned Index,
if (!pImpl) return AttributeSet();
if (!Attrs.pImpl) return *this;

// FIXME it is not obvious how this should work for alignment.
// For now, say we can't pass in alignment, which no current use does.
assert(!Attrs.hasAttribute(Index, Attribute::Alignment) &&
"Attempt to change alignment!");

// Add the attribute slots before the one we're trying to add.
SmallVector<AttributeSet, 4> AttrSet;
uint64_t NumAttrs = pImpl->getNumAttributes();
Expand Down
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