Re-version spec to 20181221-Public-Review-draft

Register YARVI's machid (riscv#260)

Describe the AMOs as "bitwise", not "logical" (riscv#259)

"logical AND" usually means C's "&&" operator, not "&" operator.  Thanks
to Bodhisattva Debnath for pointing out the issue!

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Version ready for ratification process.

Update .gitignore

Update marchid.md for VectorBlox ORCA (riscv#253)

Define new RVC format CA; state that C.AND, etc. use it

This is not a functional change, just an improvement to the description.

Resolves riscv#45

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Update marchid.md (riscv#254)