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Merge pull request pulp-platform#103 from pulp-platform/id_width_conv…
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Add ID Width Converter
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andreaskurth authored Dec 7, 2021
2 parents 90eddb4 + 260face commit 2626030
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19 changes: 19 additions & 0 deletions .ci/Memora.yml
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Expand Up @@ -116,6 +116,25 @@ artifacts:
outputs:
- build/axi_isolate-%.tested

axi_iw_converter-%:
inputs:
- Bender.yml
- include
- scripts/run_vsim.sh
- src/axi_pkg.sv
- src/axi_intf.sv
- src/axi_test.sv
- src/axi_id_prepend.sv
- src/axi_id_remap.sv
- src/axi_demux.sv
- src/axi_serializer.sv
- src/axi_mux.sv
- src/axi_id_serialize.sv
- src/axi_iw_converter.sv
- test/tb_axi_iw_converter.sv
outputs:
- build/axi_iw_converter-%.tested

axi_lite_regs-%:
inputs:
- Bender.yml
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5 changes: 5 additions & 0 deletions .gitlab-ci.yml
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Expand Up @@ -98,6 +98,11 @@ axi_isolate:
variables:
TEST_MODULE: axi_isolate

axi_iw_converter:
<<: *run_vsim
variables:
TEST_MODULE: axi_iw_converter

axi_lite_regs:
<<: *run_vsim
variables:
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4 changes: 4 additions & 0 deletions Bender.yml
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Expand Up @@ -32,6 +32,7 @@ sources:
- src/axi_demux.sv
- src/axi_dw_downsizer.sv
- src/axi_dw_upsizer.sv
- src/axi_id_remap.sv
- src/axi_id_prepend.sv
- src/axi_isolate.sv
- src/axi_join.sv
Expand All @@ -49,9 +50,11 @@ sources:
- src/axi_cdc.sv
- src/axi_err_slv.sv
- src/axi_dw_converter.sv
- src/axi_id_serialize.sv
- src/axi_multicut.sv
- src/axi_to_axi_lite.sv
# Level 4
- src/axi_iw_converter.sv
- src/axi_lite_xbar.sv
- src/axi_xbar.sv

Expand Down Expand Up @@ -79,6 +82,7 @@ sources:
- test/tb_axi_isolate.sv
- test/tb_axi_lite_mailbox.sv
- test/tb_axi_lite_regs.sv
- test/tb_axi_iw_converter.sv
- test/tb_axi_lite_to_apb.sv
- test/tb_axi_lite_to_axi.sv
- test/tb_axi_lite_xbar.sv
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8 changes: 8 additions & 0 deletions CHANGELOG.md
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Expand Up @@ -8,6 +8,14 @@ and this project adheres to [Semantic Versioning](http://semver.org/spec/v2.0.0.
## Unreleased

### Added
- Add three modules to convert between any two AXI ID widths under many different concurrency
requirements:
- `axi_iw_converter` is the top-level module that converts between any two AXI ID widths with all
supported parameters. It upsizes IDs by extending the MSBs with zeros and joins two interfaces
with identical ID widths. For downsizing IDs, it instantiates one of the following two modules:
- `axi_id_remap` remaps AXI IDs from wide IDs at the slave port to narrower IDs at the master
port without serializing transactions.
- `axi_id_serialize` reduces AXI IDs by serializing transactions when necessary.

### Changed

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6 changes: 6 additions & 0 deletions README.md
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Expand Up @@ -32,8 +32,11 @@ In addition to the documents linked in the following table, we are setting up [d
| [`axi_dw_upsizer`](src/axi_dw_upsizer.sv) | A data width converter between a narrow AXI master and a wider AXI slave. | |
| [`axi_err_slv`](src/axi_err_slv.sv) | Always responds with an AXI decode/slave error for transactions which are sent to it. | |
| [`axi_id_prepend`](src/axi_id_prepend.sv) | This module prepends/strips the MSB from the AXI IDs. | |
| [`axi_id_remap`](src/axi_id_remap.sv) | Remap AXI IDs from wide IDs at the slave port to narrower IDs at the master port. | [Doc][doc.axi_id_remap] |
| [`axi_id_serialize`](src/axi_id_serialize.sv) | Reduce AXI IDs by serializing transactions when necessary. | [Doc][doc.axi_id_serialize] |
| [`axi_intf`](src/axi_intf.sv) | This file defines the interfaces we support. | |
| [`axi_isolate`](src/axi_isolate.sv) | A module that can isolate downstream slaves from receiving new AXI4 transactions. | |
| [`axi_iw_converter`](src/axi_iw_converter.sv) | Convert between any two AXI ID widths. | [Doc][doc.axi_iw_converter] |
| [`axi_join`](src/axi_join.sv) | A connector that joins two AXI interfaces. | |
| [`axi_lite_demux`](src/axi_lite_demux.sv) | Demultiplexes an AXI4-Lite bus from one slave port to multiple master ports. | [Doc](doc/axi_lite_demux.md) |
| [`axi_lite_join`](src/axi_lite_join.sv) | A connector that joins two AXI-Lite interfaces. | |
Expand Down Expand Up @@ -97,4 +100,7 @@ All code in each release and on the default branch is tested on a recent version


[IEEE 1800-2012]: https://standards.ieee.org/standard/1800-2012.html
[doc.axi_id_remap]: https://pulp-platform.github.io/axi/master/module.axi_id_remap
[doc.axi_id_serialize]: https://pulp-platform.github.io/axi/master/module.axi_id_serialize
[doc.axi_iw_converter]: https://pulp-platform.github.io/axi/master/module.axi_iw_converter
[doc.axi_lite_regs]: https://pulp-platform.github.io/axi/master/module.axi_lite_regs
2 changes: 1 addition & 1 deletion VERSION
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@@ -1 +1 @@
0.30.1-dev
0.31.0-dev
5 changes: 4 additions & 1 deletion axi.core
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@@ -1,6 +1,6 @@
CAPI=2:

name : pulp-platform.org::axi:0.30.1-dev
name : pulp-platform.org::axi:0.31.0-dev

filesets:
rtl:
Expand All @@ -24,6 +24,7 @@ filesets:
- src/axi_demux.sv
- src/axi_dw_downsizer.sv
- src/axi_dw_upsizer.sv
- src/axi_id_remap.sv
- src/axi_id_prepend.sv
- src/axi_isolate.sv
- src/axi_join.sv
Expand All @@ -41,9 +42,11 @@ filesets:
- src/axi_cdc.sv
- src/axi_err_slv.sv
- src/axi_dw_converter.sv
- src/axi_id_serialize.sv
- src/axi_multicut.sv
- src/axi_to_axi_lite.sv
# Level 4
- src/axi_iw_converter.sv
- src/axi_lite_xbar.sv
- src/axi_xbar.sv
file_type : systemVerilogSource
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