An FPGA-based QOI image compressor and decompressor in Verilog. 基于FPGA的QOI图像压缩器和解压器。

软件模拟从机iic，基于stc8

A software oscilloscope and signal analysis toolset

A testing tool for serial port, network, bluetooth, http, websocket, ...

CDBUS (Controller Distributed Bus) Protocol and IP Core

3 modules: UART receiver, UART transmitter, UART to AXI4 master. 3个模块：UART接收器、UART发送器、UART转AXI4交互式调试器

An FPGA-based GZIP (Deflate algorithm) compressor, which inputs raw data and outputs standard GZIP format (as known as .gz file format). 基于FPGA的GZIP压缩器。输入原始数据，输出标准的GZIP格式，即常见的 .gz / .tar.gz 文件的格式。

Xilinx FPGA PCIe 保姆级教程 ——基于 PCIe XDMA IP核

模仿稚晖君MonoUI风格的超丝滑菜单，使用0.96寸OLED显示，EC11旋转编码器控制。

模仿稚晖君MonoUI风格的超丝滑菜单，使用EC11旋转编码器控制。

ZYNQ7010-20 开源开发板，经济实惠好吃不贵

FAST

An FPGA-based SD-card reader to read files from FAT16 or FAT32 formatted SD-cards. 基于FPGA的SD卡读取器，可以从FAT16或FAT32格式的SD卡中读取文件。

A software-based small signal analysis tool for digital controlled power supplies and more

Verilog AXI stream components for FPGA implementation

An FPGA-based SD-card reader to read files from FAT16 or FAT32 formatted SD-cards. 基于FPGA的SD卡读取器，可以从FAT16或FAT32格式的SD卡中读取文件。

An FPGA-based lightweight CAN bus controller. 基于FPGA的轻量级CAN总线控制器。

Verilog Ethernet Switch (layer 2)

An FPGA-based Field Oriented Control (FOC) for driving BLDC/PMSM motor. 基于FPGA的FOC控制器，用于驱动BLDC/PMSM电机。

Basic Peripheral SoC (SPI, GPIO, Timer, UART)

FPGA implementation of a CDR targeting a Xilinx Kintex-7 for data rates up to 250 MHz

Synthesizable RTL of Hamming Code based Error Detection and Correction Circuit

Hamming encoder e decoder + parity bit

Verilog program that receives a data input on 32 bits and returns the data output on 32 bits, where the flipped bit is corrected. If there are more than one bit flips, then a signal will be activat…

Verilog module that receives a data input on 32 bits and returns the data output on 32 bits, where the flipped bit is corrected. If there are two bit flips, then a signal will be activated stating so

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