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soc: stm32f1: Add support for stm32f1xx SoCs
Define stm32f100xx family, tested using stm32vl_disco (stm32f100rb). Signed-off-by: Jonas Eriksson <[email protected]>
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/* | ||
* Copyright (c) 2020 Jonas Eriksson, Up to Code AB | ||
* | ||
* SoC device tree include for STM32F100xB SoCs | ||
* | ||
* SPDX-License-Identifier: Apache-2.0 | ||
*/ | ||
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#include <mem.h> | ||
#include <st/f1/stm32f1.dtsi> | ||
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/ { | ||
sram0: memory@20000000 { | ||
reg = <0x20000000 DT_SIZE_K(8)>; | ||
}; | ||
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soc { | ||
flash-controller@40022000 { | ||
flash0: flash@8000000 { | ||
reg = <0x08000000 DT_SIZE_K(128)>; | ||
erase-block-size = <DT_SIZE_K(1)>; | ||
}; | ||
}; | ||
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spi2: spi@40003800 { | ||
compatible = "st,stm32-spi"; | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
reg = <0x40003800 0x400>; | ||
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>; | ||
interrupts = <36 5>; | ||
status = "disabled"; | ||
label = "SPI_2"; | ||
}; | ||
}; | ||
}; |
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/* | ||
* Copyright (c) 2020 Jonas Eriksson, Up to Code AB | ||
* | ||
* SoC device tree include for STM32F100xE SoCs | ||
* | ||
* SPDX-License-Identifier: Apache-2.0 | ||
*/ | ||
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#include <mem.h> | ||
#include <st/f1/stm32f100Xb.dtsi> | ||
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/ { | ||
sram0: memory@20000000 { | ||
reg = <0x20000000 DT_SIZE_K(32)>; | ||
}; | ||
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soc { | ||
flash-controller@40022000 { | ||
flash0: flash@8000000 { | ||
reg = <0x08000000 DT_SIZE_K(512)>; | ||
}; | ||
}; | ||
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spi3: spi@40003c00 { | ||
compatible = "st,stm32-spi"; | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
reg = <0x40003c00 0x400>; | ||
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00008000>; | ||
interrupts = <51 5>; | ||
status = "disabled"; | ||
label = "SPI_3"; | ||
}; | ||
}; | ||
}; |
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# ST Microelectronics STM32F100XX MCU | ||
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# Copyright (c) 2020, Jonas Eriksson, Up to Code AB | ||
# SPDX-License-Identifier: Apache-2.0 | ||
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if SOC_STM32F100XB | ||
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config SOC | ||
default "stm32f100xb" | ||
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config NUM_IRQS | ||
default 56 | ||
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endif # SOC_STM32F100XB | ||
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if SOC_STM32F100XE | ||
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config SOC | ||
default "stm32f100xe" | ||
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config NUM_IRQS | ||
default 61 | ||
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endif # SOC_STM32F100XE |
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