drivers: usb/stm32: use dts information to populate clock settings

This patch populates "clocks" property in stm32 usb nodes for clock related usb configuration code of each dtsi files Signed-off-by: Francois Ramu <[email protected]>
magnev · Jul 16, 2019 · 474c99c · 474c99c
1 parent 8e11970
commit 474c99c
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Showing 27 changed files with 59 additions and 23 deletions.
diff --git a/drivers/usb/device/usb_dc_stm32.c b/drivers/usb/device/usb_dc_stm32.c
@@ -196,29 +196,8 @@ static int usb_dc_stm32_clock_enable(void)
 {
 	struct device *clk = device_get_binding(STM32_CLOCK_CONTROL_NAME);
 	struct stm32_pclken pclken = {
-
-#ifdef DT_USB_HS_BASE_ADDRESS
-		.bus = STM32_CLOCK_BUS_AHB1,
-		.enr = LL_AHB1_GRP1_PERIPH_OTGHS
-#else /* DT_USB_HS_BASE_ADDRESS */
-
-#ifdef USB
-		.bus = STM32_CLOCK_BUS_APB1,
-		.enr = LL_APB1_GRP1_PERIPH_USB,
-
-#else /* USB_OTG_FS */
-
-#ifdef CONFIG_SOC_SERIES_STM32F1X
-		.bus = STM32_CLOCK_BUS_AHB1,
-		.enr = LL_AHB1_GRP1_PERIPH_OTGFS,
-#else
-		.bus = STM32_CLOCK_BUS_AHB2,
-		.enr = LL_AHB2_GRP1_PERIPH_OTGFS,
-#endif /* CONFIG_SOC_SERIES_STM32F1X */
-
-#endif /* USB */
-
-#endif /* DT_USB_HS_BASE_ADDRESS */
+		.bus = DT_USB_CLOCK_BUS,
+		.enr = DT_USB_CLOCK_BITS,
 	};
 
 	/*

diff --git a/dts/arm/st/f0/stm32f070.dtsi b/dts/arm/st/f0/stm32f070.dtsi
@@ -33,6 +33,7 @@
 			num-bidir-endpoints = <8>;
 			ram-size = <1024>;
 			phys = <&usb_fs_phy>;
+			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00800000>;
 			status = "disabled";
 			label= "USB";
 		};

diff --git a/dts/arm/st/f0/stm32f072.dtsi b/dts/arm/st/f0/stm32f072.dtsi
@@ -61,6 +61,7 @@
 			num-bidir-endpoints = <8>;
 			ram-size = <1024>;
 			phys = <&usb_fs_phy>;
+			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00800000>;
 			status = "disabled";
 			label= "USB";
 		};

diff --git a/dts/arm/st/f1/stm32f103X8.dtsi b/dts/arm/st/f1/stm32f103X8.dtsi
@@ -39,6 +39,7 @@
 			num-bidir-endpoints = <8>;
 			ram-size = <512>;
 			status = "disabled";
+			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00800000>;
 			phys = <&usb_fs_phy>;
 			label= "USB";
 		};

diff --git a/dts/arm/st/f2/stm32f2.dtsi b/dts/arm/st/f2/stm32f2.dtsi
@@ -208,6 +208,7 @@
 			num-bidir-endpoints = <4>;
 			ram-size = <1280>;
 			maximum-speed = "full-speed";
+			clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x20000000>;
 			phys = <&otgfs_phy>;
 			status = "disabled";
 			label = "OTGFS";

diff --git a/dts/arm/st/f3/stm32f3.dtsi b/dts/arm/st/f3/stm32f3.dtsi
@@ -171,6 +171,7 @@
 			num-bidir-endpoints = <8>;
 			ram-size = <512>;
 			phys = <&usb_fs_phy>;
+			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00800000>;
 			status = "disabled";
 			label= "USB";
 		};

diff --git a/dts/arm/st/f4/stm32f4.dtsi b/dts/arm/st/f4/stm32f4.dtsi
@@ -217,6 +217,7 @@
 			ram-size = <1280>;
 			maximum-speed = "full-speed";
 			phys = <&otgfs_phy>;
+			clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000080>;
 			status = "disabled";
 			label= "OTGFS";
 		};

diff --git a/dts/arm/st/f4/stm32f405.dtsi b/dts/arm/st/f4/stm32f405.dtsi
@@ -172,6 +172,7 @@
 			ram-size = <4096>;
 			maximum-speed = "full-speed";
 			phys = <&otghs_fs_phy>;
+			clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x20000000>;
 			status = "disabled";
 			label= "OTGHS";
 		};

diff --git a/dts/arm/st/f4/stm32f446.dtsi b/dts/arm/st/f4/stm32f446.dtsi
@@ -30,6 +30,7 @@
 			ram-size = <4096>;
 			maximum-speed = "full-speed";
 			phys = <&otghs_fs_phy>;
+			clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x20000000>;
 			status = "disabled";
 			label= "OTGHS";
 		};

diff --git a/dts/arm/st/f7/stm32f7.dtsi b/dts/arm/st/f7/stm32f7.dtsi
@@ -571,6 +571,7 @@
 			ram-size = <1280>;
 			maximum-speed = "full-speed";
 			phys = <&otgfs_phy>;
+			clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000080>;
 			status = "disabled";
 			label = "OTGFS";
 		};
@@ -583,6 +584,7 @@
 			num-bidir-endpoints = <9>;
 			ram-size = <4096>;
 			maximum-speed = "full-speed";
+			clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x20000000>;
 			phys = <&otghs_fs_phy>;
 			status = "disabled";
 			label= "OTGHS";

diff --git a/dts/arm/st/l0/stm32l072.dtsi b/dts/arm/st/l0/stm32l072.dtsi
@@ -65,6 +65,7 @@
 			num-bidir-endpoints = <8>;
 			ram-size = <1024>;
 			phys = <&otgfs_phy>;
+			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00800000>;
 			status = "disabled";
 			label= "USB";
 		};

diff --git a/dts/arm/st/l0/stm32l073.dtsi b/dts/arm/st/l0/stm32l073.dtsi
@@ -64,6 +64,7 @@
 			num-bidir-endpoints = <8>;
 			ram-size = <1024>;
 			phys = <&otgfs_phy>;
+			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00800000>;
 			status = "disabled";
 			label= "USB";
 		};

diff --git a/dts/arm/st/l4/stm32l432.dtsi b/dts/arm/st/l4/stm32l432.dtsi
@@ -16,6 +16,7 @@
 			num-bidir-endpoints = <8>;
 			ram-size = <1024>;
 			phys = <&usb_fs_phy>;
+			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x04000000>;
 			status = "disabled";
 			label = "USB";
 		};

diff --git a/dts/arm/st/l4/stm32l452.dtsi b/dts/arm/st/l4/stm32l452.dtsi
@@ -36,6 +36,7 @@
 			num-bidir-endpoints = <8>;
 			ram-size = <1024>;
 			phys = <&usb_fs_phy>;
+			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x04000000>;
 			status = "disabled";
 			label = "USB";
 		};

diff --git a/dts/arm/st/l4/stm32l475.dtsi b/dts/arm/st/l4/stm32l475.dtsi
@@ -17,6 +17,7 @@
 			ram-size = <1280>;
 			maximum-speed = "full-speed";
 			phys = <&otgfs_phy>;
+			clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00001000>;
 			status = "disabled";
 			label= "OTGFS";
 		};

diff --git a/dts/arm/st/l4/stm32l4r5.dtsi b/dts/arm/st/l4/stm32l4r5.dtsi
@@ -139,6 +139,7 @@
 			num-bidir-endpoints = <6>;
 			ram-size = <1280>;
 			maximum-speed = "full-speed";
+			clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00001000>;
 			phys = <&otgfs_phy>;
 			status = "disabled";
 			label= "OTGFS";

diff --git a/dts/bindings/usb/st,stm32-otgfs.yaml b/dts/bindings/usb/st,stm32-otgfs.yaml
@@ -33,3 +33,9 @@ properties:
       type: array
       category: optional
       description: PHY provider specifier
+
+    clocks:
+      type: array
+      category: required
+      description: Clock gate control information
+      generation: define
diff --git a/dts/bindings/usb/st,stm32-otghs.yaml b/dts/bindings/usb/st,stm32-otghs.yaml
@@ -33,3 +33,9 @@ properties:
       type: array
       category: optional
       description: PHY provider specifier
+
+    clocks:
+      type: array
+      category: required
+      description: Clock gate control information
+      generation: define
diff --git a/dts/bindings/usb/st,stm32-usb.yaml b/dts/bindings/usb/st,stm32-usb.yaml
@@ -45,3 +45,10 @@ properties:
       category: optional
       description: For STM32F0 series SoCs on QFN28 and TSSOP20 packages
                    enable PIN pair PA11/12 mapped instead of PA9/10 (e.g. stm32f070x6)
+      generation: define
+
+    clocks:
+      type: array
+      category: required
+      description: Clock gate control information
+      generation: define
diff --git a/soc/arm/st_stm32/stm32f0/dts_fixup.h b/soc/arm/st_stm32/stm32f0/dts_fixup.h
@@ -127,6 +127,8 @@
 #define DT_USB_IRQ_PRI			DT_ST_STM32_USB_40005C00_IRQ_USB_PRIORITY
 #define DT_USB_NUM_BIDIR_ENDPOINTS		DT_ST_STM32_USB_40005C00_NUM_BIDIR_ENDPOINTS
 #define DT_USB_RAM_SIZE			DT_ST_STM32_USB_40005C00_RAM_SIZE
+#define DT_USB_CLOCK_BITS		DT_ST_STM32_USB_40005C00_CLOCK_BITS
+#define DT_USB_CLOCK_BUS		DT_ST_STM32_USB_40005C00_CLOCK_BUS
 
 #ifdef DT_ST_STM32_USB_40005C00_ENABLE_PIN_REMAP
 #define DT_USB_ENABLE_PIN_REMAP			DT_ST_STM32_USB_40005C00_ENABLE_PIN_REMAP

diff --git a/soc/arm/st_stm32/stm32f1/dts_fixup.h b/soc/arm/st_stm32/stm32f1/dts_fixup.h
@@ -156,6 +156,8 @@
 #define DT_USB_IRQ_PRI			DT_ST_STM32_USB_40005C00_IRQ_USB_PRIORITY
 #define DT_USB_NUM_BIDIR_ENDPOINTS		DT_ST_STM32_USB_40005C00_NUM_BIDIR_ENDPOINTS
 #define DT_USB_RAM_SIZE			DT_ST_STM32_USB_40005C00_RAM_SIZE
+#define DT_USB_CLOCK_BITS		DT_ST_STM32_USB_40005C00_CLOCK_BITS
+#define DT_USB_CLOCK_BUS		DT_ST_STM32_USB_40005C00_CLOCK_BUS
 
 #define DT_PWM_STM32_1_DEV_NAME             DT_ST_STM32_PWM_40012C00_PWM_LABEL
 #define DT_PWM_STM32_1_PRESCALER            DT_ST_STM32_PWM_40012C00_PWM_ST_PRESCALER

diff --git a/soc/arm/st_stm32/stm32f2/dts_fixup.h b/soc/arm/st_stm32/stm32f2/dts_fixup.h
@@ -145,6 +145,8 @@
 #define DT_USB_NUM_BIDIR_ENDPOINTS		DT_ST_STM32_OTGFS_50000000_NUM_BIDIR_ENDPOINTS
 #define DT_USB_RAM_SIZE			DT_ST_STM32_OTGFS_50000000_RAM_SIZE
 #define DT_USB_MAXIMUM_SPEED		DT_ST_STM32_OTGFS_50000000_MAXIMUM_SPEED
+#define DT_USB_CLOCK_BITS		DT_ST_STM32_OTGFS_50000000_CLOCK_BITS
+#define DT_USB_CLOCK_BUS		DT_ST_STM32_OTGFS_50000000_CLOCK_BUS
 
 #define DT_WDT_0_NAME                   DT_INST_0_ST_STM32_WATCHDOG_LABEL
 

diff --git a/soc/arm/st_stm32/stm32f3/dts_fixup.h b/soc/arm/st_stm32/stm32f3/dts_fixup.h
@@ -151,6 +151,8 @@
 #define DT_USB_IRQ_PRI			DT_ST_STM32_USB_40005C00_IRQ_USB_PRIORITY
 #define DT_USB_NUM_BIDIR_ENDPOINTS		DT_ST_STM32_USB_40005C00_NUM_BIDIR_ENDPOINTS
 #define DT_USB_RAM_SIZE			DT_ST_STM32_USB_40005C00_RAM_SIZE
+#define DT_USB_CLOCK_BITS		DT_ST_STM32_USB_40005C00_CLOCK_BITS
+#define DT_USB_CLOCK_BUS		DT_ST_STM32_USB_40005C00_CLOCK_BUS
 
 #define DT_PWM_STM32_1_DEV_NAME             DT_ST_STM32_PWM_40012C00_PWM_LABEL
 #define DT_PWM_STM32_1_PRESCALER            DT_ST_STM32_PWM_40012C00_PWM_ST_PRESCALER

diff --git a/soc/arm/st_stm32/stm32f4/dts_fixup.h b/soc/arm/st_stm32/stm32f4/dts_fixup.h
@@ -290,6 +290,8 @@
 #define DT_USB_NUM_BIDIR_ENDPOINTS		DT_ST_STM32_OTGFS_50000000_NUM_BIDIR_ENDPOINTS
 #define DT_USB_RAM_SIZE			DT_ST_STM32_OTGFS_50000000_RAM_SIZE
 #define DT_USB_MAXIMUM_SPEED		DT_ST_STM32_OTGFS_50000000_MAXIMUM_SPEED
+#define DT_USB_CLOCK_BITS		DT_ST_STM32_OTGFS_50000000_CLOCK_BITS
+#define DT_USB_CLOCK_BUS		DT_ST_STM32_OTGFS_50000000_CLOCK_BUS
 #endif /*  DT_ST_STM32_OTGFS_50000000_BASE_ADDRESS */
 
 #ifdef DT_ST_STM32_OTGHS_40040000_BASE_ADDRESS
@@ -299,6 +301,8 @@
 #define DT_USB_NUM_BIDIR_ENDPOINTS		DT_ST_STM32_OTGHS_40040000_NUM_BIDIR_ENDPOINTS
 #define DT_USB_RAM_SIZE			DT_ST_STM32_OTGHS_40040000_RAM_SIZE
 #define DT_USB_MAXIMUM_SPEED		DT_ST_STM32_OTGHS_40040000_MAXIMUM_SPEED
+#define DT_USB_CLOCK_BITS		DT_ST_STM32_OTGHS_40040000_CLOCK_BITS
+#define DT_USB_CLOCK_BUS		DT_ST_STM32_OTGHS_40040000_CLOCK_BUS
 #endif /* DT_ST_STM32_OTGHS_40040000_BASE_ADDRESS */
 
 #define DT_PWM_STM32_1_DEV_NAME             DT_ST_STM32_PWM_40010000_PWM_LABEL

diff --git a/soc/arm/st_stm32/stm32f7/dts_fixup.h b/soc/arm/st_stm32/stm32f7/dts_fixup.h
@@ -266,6 +266,8 @@
 #define DT_USB_NUM_BIDIR_ENDPOINTS		DT_ST_STM32_OTGFS_50000000_NUM_BIDIR_ENDPOINTS
 #define DT_USB_RAM_SIZE			DT_ST_STM32_OTGFS_50000000_RAM_SIZE
 #define DT_USB_MAXIMUM_SPEED		DT_ST_STM32_OTGFS_50000000_MAXIMUM_SPEED
+#define DT_USB_CLOCK_BITS		DT_ST_STM32_OTGFS_50000000_CLOCK_BITS
+#define DT_USB_CLOCK_BUS		DT_ST_STM32_OTGFS_50000000_CLOCK_BUS
 #endif /* DT_ST_STM32_OTGFS_50000000_BASE_ADDRESS */
 
 #ifdef DT_ST_STM32_OTGHS_40040000_BASE_ADDRESS
@@ -275,6 +277,8 @@
 #define DT_USB_NUM_BIDIR_ENDPOINTS		DT_ST_STM32_OTGHS_40040000_NUM_BIDIR_ENDPOINTS
 #define DT_USB_RAM_SIZE			DT_ST_STM32_OTGHS_40040000_RAM_SIZE
 #define DT_USB_MAXIMUM_SPEED		DT_ST_STM32_OTGHS_40040000_MAXIMUM_SPEED
+#define DT_USB_CLOCK_BITS		DT_ST_STM32_OTGHS_40040000_CLOCK_BITS
+#define DT_USB_CLOCK_BUS		DT_ST_STM32_OTGHS_40040000_CLOCK_BUS
 #endif /* DT_ST_STM32_OTGHS_40040000_BASE_ADDRESS */
 
 #define DT_PWM_STM32_1_DEV_NAME		DT_ST_STM32_PWM_40010000_PWM_LABEL

diff --git a/soc/arm/st_stm32/stm32l0/dts_fixup.h b/soc/arm/st_stm32/stm32l0/dts_fixup.h
@@ -130,6 +130,8 @@
 #define DT_USB_IRQ_PRI			DT_ST_STM32_USB_40005C00_IRQ_USB_PRIORITY
 #define DT_USB_NUM_BIDIR_ENDPOINTS		DT_ST_STM32_USB_40005C00_NUM_BIDIR_ENDPOINTS
 #define DT_USB_RAM_SIZE			DT_ST_STM32_USB_40005C00_RAM_SIZE
+#define DT_USB_CLOCK_BITS		DT_ST_STM32_USB_40005C00_CLOCK_BITS
+#define DT_USB_CLOCK_BUS		DT_ST_STM32_USB_40005C00_CLOCK_BUS
 
 #define DT_WDT_0_NAME                   DT_INST_0_ST_STM32_WATCHDOG_LABEL
 

diff --git a/soc/arm/st_stm32/stm32l4/dts_fixup.h b/soc/arm/st_stm32/stm32l4/dts_fixup.h
@@ -218,6 +218,8 @@
 #define DT_USB_IRQ_PRI			DT_ST_STM32_USB_40006800_IRQ_USB_PRIORITY
 #define DT_USB_NUM_BIDIR_ENDPOINTS		DT_ST_STM32_USB_40006800_NUM_BIDIR_ENDPOINTS
 #define DT_USB_RAM_SIZE			DT_ST_STM32_USB_40006800_RAM_SIZE
+#define DT_USB_CLOCK_BITS		DT_ST_STM32_USB_40006800_CLOCK_BITS
+#define DT_USB_CLOCK_BUS		DT_ST_STM32_USB_40006800_CLOCK_BUS
 #endif
 
 #if defined(DT_ST_STM32_OTGFS_50000000_BASE_ADDRESS)
@@ -227,6 +229,8 @@
 #define DT_USB_NUM_BIDIR_ENDPOINTS		DT_ST_STM32_OTGFS_50000000_NUM_BIDIR_ENDPOINTS
 #define DT_USB_RAM_SIZE			DT_ST_STM32_OTGFS_50000000_RAM_SIZE
 #define DT_USB_MAXIMUM_SPEED		DT_ST_STM32_OTGFS_50000000_MAXIMUM_SPEED
+#define DT_USB_CLOCK_BITS		DT_ST_STM32_OTGFS_50000000_CLOCK_BITS
+#define DT_USB_CLOCK_BUS		DT_ST_STM32_OTGFS_50000000_CLOCK_BUS
 #endif
 
 #define DT_PWM_STM32_1_DEV_NAME             DT_ST_STM32_PWM_40012C00_PWM_LABEL