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Merge tag 'devicetree-for-6.0' of git://git.kernel.org/pub/scm/linux/…
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…kernel/git/robh/linux

Pull devicetree updates from Rob Herring:
 "Bindings:

   - Add spi-peripheral-props.yaml references to various SPI device
     bindings

   - Convert qcom,pm8916-wdt, ds1307, Qualcomm BAM DMA, is31fl319x,
     skyworks,aat1290, Rockchip EMAC, gpio-ir-receiver, ahci-ceva, Arm
     CCN PMU, rda,8810pl-intc, sil,sii9022, ps2-gpio, and
     arm-firmware-suite bindings to DT schema format

   - New bindings for Arm virtual platforms display, Qualcomm IMEM
     memory region, Samsung S5PV210 ChipID, EM Microelectronic EM3027
     RTC, and arm,cortex-a78ae

   - Add vendor prefixes for asrock, bytedance, hxt, ingrasys, inventec,
     quanta, and densitron

   - Add missing MSI and IOMMU properties to host-generic-pci

   - Remove bindings for removed EFM32 platform

   - Remove old chosen.txt binding (replaced by schema)

   - Treewide add missing type information for properties

   - Treewide fixing of typos and its vs. it's in bindings. Its all good
     now.

   - Drop unnecessary quoting in power related schemas

   - Several LED binding updates which didn't get picked up

   - Move various bindings to proper directories

  DT core code:

   - Convert unittest GPIO related tests to use fwnode

   - Check ima-kexec-buffer against memory bounds

   - Print reserved-memory allocation/reservation failures as errors

   - Cleanup early_init_dt_reserve_memory_arch()

   - Simplify of_overlay_fdt_apply() tail"

* tag 'devicetree-for-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (65 commits)
  dt-bindings: mtd: microchip,mchp48l640: use spi-peripheral-props.yaml
  dt-bindings: power: supply: drop quotes when not needed
  dt-bindings: power: reset: drop quotes when not needed
  dt-bindings: power: drop quotes when not needed
  dt-bindings: PCI: host-generic-pci: Allow IOMMU and MSI properties
  of/fdt: declared return type does not match actual return type
  devicetree/bindings: correct possessive "its" typos
  dt-bindings: net: convert emac_rockchip.txt to YAML
  dt-bindings: eeprom: microchip,93lc46b: move to eeprom directory
  dt-bindings: eeprom: at25: use spi-peripheral-props.yaml
  dt-bindings: display: use spi-peripheral-props.yaml
  dt-bindings: watchdog: qcom,pm8916-wdt: convert to dtschema
  dt-bindings: power: reset: qcom,pon: use absolute path to other schema
  dt-bindings: iio/dac: adi,ad5766: Add missing type to 'output-range-microvolts'
  dt-bindings: power: supply: charger-manager: Add missing type for 'cm-battery-stat'
  dt-bindings: panel: raydium,rm67191: Add missing type to 'video-mode'
  of/fdt: Clean up early_init_dt_reserve_memory_arch()
  dt-bindings: PCI: fsl,imx6q-pcie: Add missing type for 'reset-gpio-active-high'
  dt-bindings: rtc: Add EM Microelectronic EM3027 bindings
  dt-bindings: rtc: ds1307: Convert to json-schema
  ...
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torvalds committed Aug 5, 2022
2 parents 8d9420c + 7e7a24c commit da8d07a
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Showing 154 changed files with 1,846 additions and 1,373 deletions.
1 change: 1 addition & 0 deletions Documentation/devicetree/bindings/arm/cpus.yaml
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Expand Up @@ -138,6 +138,7 @@ properties:
- arm,cortex-a76
- arm,cortex-a77
- arm,cortex-a78
- arm,cortex-a78ae
- arm,cortex-a510
- arm,cortex-a710
- arm,cortex-m0
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2 changes: 1 addition & 1 deletion Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@ system, notifying them when a low power state is entered or exited.
Multiple revisions of the SAW hardware are supported using these Device Nodes.
SAW2 revisions differ in the register offset and configuration data. Also, the
same revision of the SAW in different SoCs may have different configuration
data due the the differences in hardware capabilities. Hence the SoC name, the
data due the differences in hardware capabilities. Hence the SoC name, the
version of the SAW hardware in that SoC and the distinction between cpu (big
or Little) or cache, may be needed to uniquely identify the SAW register
configuration and initialization data. The compatible string is used to
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Original file line number Diff line number Diff line change
Expand Up @@ -208,7 +208,7 @@ properties:
"^[a-z0-9]+$":
type: object

patternProperties:
properties:
clocks:
minItems: 1
maxItems: 8
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10 changes: 8 additions & 2 deletions Documentation/devicetree/bindings/arm/vexpress-sysreg.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -29,6 +29,13 @@ properties:

ranges: true

gpio-controller:
deprecated: true

"#gpio-cells":
deprecated: true
const: 2

additionalProperties: false

patternProperties:
Expand Down Expand Up @@ -67,8 +74,7 @@ patternProperties:

required:
- compatible
- "#address-cells"
- "#size-cells"
- reg

examples:
- |
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63 changes: 0 additions & 63 deletions Documentation/devicetree/bindings/ata/ahci-ceva.txt

This file was deleted.

189 changes: 189 additions & 0 deletions Documentation/devicetree/bindings/ata/ceva,ahci-1v84.yaml
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@@ -0,0 +1,189 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/ata/ceva,ahci-1v84.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Ceva AHCI SATA Controller

maintainers:
- Piyush Mehta <[email protected]>

description: |
The Ceva SATA controller mostly conforms to the AHCI interface with some
special extensions to add functionality, is a high-performance dual-port
SATA host controller with an AHCI compliant command layer which supports
advanced features such as native command queuing and frame information
structure (FIS) based switching for systems employing port multipliers.
properties:
compatible:
const: ceva,ahci-1v84

reg:
maxItems: 1

clocks:
maxItems: 1

dma-coherent: true

interrupts:
maxItems: 1

iommus:
maxItems: 1

power-domains:
maxItems: 1

ceva,p0-cominit-params:
$ref: /schemas/types.yaml#/definitions/uint8-array
description: |
OOB timing value for COMINIT parameter for port 0.
The fields for the above parameter must be as shown below:-
ceva,p0-cominit-params = /bits/ 8 <CIBGMN CIBGMX CIBGN CINMP>;
items:
- description: CINMP - COMINIT Negate Minimum Period.
- description: CIBGN - COMINIT Burst Gap Nominal.
- description: CIBGMX - COMINIT Burst Gap Maximum.
- description: CIBGMN - COMINIT Burst Gap Minimum.

ceva,p0-comwake-params:
$ref: /schemas/types.yaml#/definitions/uint8-array
description: |
OOB timing value for COMWAKE parameter for port 0.
The fields for the above parameter must be as shown below:-
ceva,p0-comwake-params = /bits/ 8 <CWBGMN CWBGMX CWBGN CWNMP>;
items:
- description: CWBGMN - COMWAKE Burst Gap Minimum.
- description: CWBGMX - COMWAKE Burst Gap Maximum.
- description: CWBGN - COMWAKE Burst Gap Nominal.
- description: CWNMP - COMWAKE Negate Minimum Period.

ceva,p0-burst-params:
$ref: /schemas/types.yaml#/definitions/uint8-array
description: |
Burst timing value for COM parameter for port 0.
The fields for the above parameter must be as shown below:-
ceva,p0-burst-params = /bits/ 8 <BMX BNM SFD PTST>;
items:
- description: BMX - COM Burst Maximum.
- description: BNM - COM Burst Nominal.
- description: SFD - Signal Failure Detection value.
- description: PTST - Partial to Slumber timer value.

ceva,p0-retry-params:
$ref: /schemas/types.yaml#/definitions/uint16-array
description: |
Retry interval timing value for port 0.
The fields for the above parameter must be as shown below:-
ceva,p0-retry-params = /bits/ 16 <RIT RCT>;
items:
- description: RIT - Retry Interval Timer.
- description: RCT - Rate Change Timer.

ceva,p1-cominit-params:
$ref: /schemas/types.yaml#/definitions/uint8-array
description: |
OOB timing value for COMINIT parameter for port 1.
The fields for the above parameter must be as shown below:-
ceva,p1-cominit-params = /bits/ 8 <CIBGMN CIBGMX CIBGN CINMP>;
items:
- description: CINMP - COMINIT Negate Minimum Period.
- description: CIBGN - COMINIT Burst Gap Nominal.
- description: CIBGMX - COMINIT Burst Gap Maximum.
- description: CIBGMN - COMINIT Burst Gap Minimum.

ceva,p1-comwake-params:
$ref: /schemas/types.yaml#/definitions/uint8-array
description: |
OOB timing value for COMWAKE parameter for port 1.
The fields for the above parameter must be as shown below:-
ceva,p1-comwake-params = /bits/ 8 <CWBGMN CWBGMX CWBGN CWNMP>;
items:
- description: CWBGMN - COMWAKE Burst Gap Minimum.
- description: CWBGMX - COMWAKE Burst Gap Maximum.
- description: CWBGN - COMWAKE Burst Gap Nominal.
- description: CWNMP - COMWAKE Negate Minimum Period.

ceva,p1-burst-params:
$ref: /schemas/types.yaml#/definitions/uint8-array
description: |
Burst timing value for COM parameter for port 1.
The fields for the above parameter must be as shown below:-
ceva,p1-burst-params = /bits/ 8 <BMX BNM SFD PTST>;
items:
- description: BMX - COM Burst Maximum.
- description: BNM - COM Burst Nominal.
- description: SFD - Signal Failure Detection value.
- description: PTST - Partial to Slumber timer value.

ceva,p1-retry-params:
$ref: /schemas/types.yaml#/definitions/uint16-array
description: |
Retry interval timing value for port 1.
The fields for the above parameter must be as shown below:-
ceva,pN-retry-params = /bits/ 16 <RIT RCT>;
items:
- description: RIT - Retry Interval Timer.
- description: RCT - Rate Change Timer.

ceva,broken-gen2:
$ref: /schemas/types.yaml#/definitions/flag
description: |
limit to gen1 speed instead of gen2.
phys:
maxItems: 1

phy-names:
items:
- const: sata-phy

resets:
maxItems: 1

required:
- compatible
- reg
- clocks
- interrupts
- ceva,p0-cominit-params
- ceva,p0-comwake-params
- ceva,p0-burst-params
- ceva,p0-retry-params
- ceva,p1-cominit-params
- ceva,p1-comwake-params
- ceva,p1-burst-params
- ceva,p1-retry-params

additionalProperties: false

examples:
- |
#include <dt-bindings/clock/xlnx-zynqmp-clk.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/power/xlnx-zynqmp-power.h>
#include <dt-bindings/reset/xlnx-zynqmp-resets.h>
#include <dt-bindings/clock/xlnx-zynqmp-clk.h>
#include <dt-bindings/phy/phy.h>
sata: ahci@fd0c0000 {
compatible = "ceva,ahci-1v84";
reg = <0xfd0c0000 0x200>;
interrupt-parent = <&gic>;
interrupts = <0 133 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk SATA_REF>;
ceva,p0-cominit-params = /bits/ 8 <0x0F 0x25 0x18 0x29>;
ceva,p0-comwake-params = /bits/ 8 <0x04 0x0B 0x08 0x0F>;
ceva,p0-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>;
ceva,p0-retry-params = /bits/ 16 <0x0216 0x7F06>;
ceva,p1-cominit-params = /bits/ 8 <0x0F 0x25 0x18 0x29>;
ceva,p1-comwake-params = /bits/ 8 <0x04 0x0B 0x08 0x0F>;
ceva,p1-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>;
ceva,p1-retry-params = /bits/ 16 <0x0216 0x7F06>;
ceva,broken-gen2;
phys = <&psgtr 1 PHY_TYPE_SATA 1 1>;
resets = <&zynqmp_reset ZYNQMP_RESET_SATA>;
};
25 changes: 11 additions & 14 deletions Documentation/devicetree/bindings/bus/qcom,ssc-block-bus.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -28,11 +28,9 @@ properties:
- const: qcom,ssc-block-bus

reg:
description: |
Shall contain the addresses of the SSCAON_CONFIG0 and SSCAON_CONFIG1
registers
minItems: 2
maxItems: 2
items:
- description: SSCAON_CONFIG0 registers
- description: SSCAON_CONFIG1 registers

reg-names:
items:
Expand All @@ -48,7 +46,6 @@ properties:
ranges: true

clocks:
minItems: 6
maxItems: 6

clock-names:
Expand All @@ -61,21 +58,21 @@ properties:
- const: ssc_ahbs

power-domains:
description: Power domain phandles for the ssc_cx and ssc_mx power domains
minItems: 2
maxItems: 2
items:
- description: CX power domain
- description: MX power domain

power-domain-names:
items:
- const: ssc_cx
- const: ssc_mx

resets:
description: |
Reset phandles for the ssc_reset and ssc_bcr resets (note: ssc_bcr is the
branch control register associated with the ssc_xo and ssc_ahbs clocks)
minItems: 2
maxItems: 2
items:
- description: Main reset
- description:
SSC Branch Control Register reset (associated with the ssc_xo and
ssc_ahbs clocks)

reset-names:
items:
Expand Down
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