Skip to content

Commit

Permalink
Merge tag 'arm-late-6.0' of git://git.kernel.org/pub/scm/linux/kernel…
Browse files Browse the repository at this point in the history
…/git/soc/soc

Pull more ARM SoC updates from Arnd Bergmann:
 "These updates came in after I had already tagged the branches, but
  they still seem appropriate for 6.0 and most of them were part of
  linux-next through other trees.

   - The reset controller tree adds one new driver for the TI TPS380x
     power management chip and a few minor changes in other drivers

   - Apple M1 now has a DT entry for the NVMe controller after the
     driver was merged, and has a new mailing list in the MAINTAINERS
     file.

   - Fixes for USB on the Socionext Uniphier platforms and the network
     controller on Intel Cyclone5"

* tag 'arm-late-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  arm64: dts: uniphier: Fix USB interrupts for PXs3 SoC
  ARM: dts: uniphier: Fix USB interrupts for PXs2 SoC
  arm64: dts: apple: t8103: Add ANS2 NVMe nodes
  reset: tps380x: Fix spelling mistake "Voltags" -> "Voltage"
  reset: tps380x: Add TPS380x device driver supprt
  dt-bindings: reset: Add TPS380x documentation
  dt-bindings: reset: renesas,rzg2l-usbphy-ctrl: Document RZ/G2UL USBPHY Control bindings
  ARM: dts: add EMAC AXI settings for Cyclone5
  reset: reset-simple should depends on HAS_IOMEM
  Revert "reset: microchip-sparx5: allow building as a module"
  reset: a10sr: allow building under COMPILE_TEST
  reset: allow building of reset simple driver if expert config selected
  reset: microchip-sparx5: allow building as a module
  arm64: dts: apple: Re-parent ANS2 power domains
  MAINTAINERS: add ARM/APPLE MACHINE mailing list
  • Loading branch information
torvalds committed Aug 5, 2022
2 parents 8db4a02 + 1630eee commit fad235e
Show file tree
Hide file tree
Showing 11 changed files with 240 additions and 16 deletions.
Original file line number Diff line number Diff line change
Expand Up @@ -17,6 +17,7 @@ properties:
compatible:
items:
- enum:
- renesas,r9a07g043-usbphy-ctrl # RZ/G2UL
- renesas,r9a07g044-usbphy-ctrl # RZ/G2{L,LC}
- renesas,r9a07g054-usbphy-ctrl # RZ/V2L
- const: renesas,rzg2l-usbphy-ctrl
Expand Down
49 changes: 49 additions & 0 deletions Documentation/devicetree/bindings/reset/ti,tps380x-reset.yaml
Original file line number Diff line number Diff line change
@@ -0,0 +1,49 @@
# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/reset/ti,tps380x-reset.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: TI TPS380x reset controller node bindings

maintainers:
- Marco Felsch <[email protected]>

description: |
The TPS380x family [1] of supervisory circuits monitor supply voltages to
provide circuit initialization and timing supervision. The devices assert a
RESET signal if the voltage drops below a preset threshold or upon a manual
reset input (MR). The RESET output remains asserted for the factory
programmed delay after the voltage return above its threshold or after the
manual reset input is released.
[1] https://www.ti.com/product/TPS3801
properties:
compatible:
enum:
- ti,tps3801

reset-gpios:
maxItems: 1
description: Reference to the GPIO connected to the MR pin.

"#reset-cells":
const: 0

required:
- compatible
- reset-gpios
- "#reset-cells"

additionalProperties: false

examples:
- |
#include <dt-bindings/gpio/gpio.h>
reset: reset-controller {
compatible = "ti,tps3801";
#reset-cells = <0>;
reset-gpios = <&gpio3 2 GPIO_ACTIVE_LOW>;
};
...
1 change: 1 addition & 0 deletions MAINTAINERS
Original file line number Diff line number Diff line change
Expand Up @@ -1850,6 +1850,7 @@ ARM/APPLE MACHINE SUPPORT
M: Hector Martin <[email protected]>
M: Sven Peter <[email protected]>
R: Alyssa Rosenzweig <[email protected]>
L: [email protected]
L: [email protected] (moderated for non-subscribers)
S: Maintained
W: https://asahilinux.org
Expand Down
8 changes: 8 additions & 0 deletions arch/arm/boot/dts/socfpga.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -561,6 +561,12 @@
interrupts = <0 175 4>;
};

socfpga_axi_setup: stmmac-axi-config {
snps,wr_osr_lmt = <0xf>;
snps,rd_osr_lmt = <0xf>;
snps,blen = <0 0 0 0 16 0 0>;
};

gmac0: ethernet@ff700000 {
compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac";
altr,sysmgr-syscon = <&sysmgr 0x60 0>;
Expand All @@ -576,6 +582,7 @@
snps,perfect-filter-entries = <128>;
tx-fifo-depth = <4096>;
rx-fifo-depth = <4096>;
snps,axi-config = <&socfpga_axi_setup>;
status = "disabled";
};

Expand All @@ -594,6 +601,7 @@
snps,perfect-filter-entries = <128>;
tx-fifo-depth = <4096>;
rx-fifo-depth = <4096>;
snps,axi-config = <&socfpga_axi_setup>;
status = "disabled";
};

Expand Down
8 changes: 4 additions & 4 deletions arch/arm/boot/dts/uniphier-pxs2.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -597,8 +597,8 @@
compatible = "socionext,uniphier-dwc3", "snps,dwc3";
status = "disabled";
reg = <0x65a00000 0xcd00>;
interrupt-names = "host", "peripheral";
interrupts = <0 134 4>, <0 135 4>;
interrupt-names = "dwc_usb3";
interrupts = <0 134 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb2>;
clock-names = "ref", "bus_early", "suspend";
Expand Down Expand Up @@ -693,8 +693,8 @@
compatible = "socionext,uniphier-dwc3", "snps,dwc3";
status = "disabled";
reg = <0x65c00000 0xcd00>;
interrupt-names = "host", "peripheral";
interrupts = <0 137 4>, <0 138 4>;
interrupt-names = "dwc_usb3";
interrupts = <0 137 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb3>;
clock-names = "ref", "bus_early", "suspend";
Expand Down
7 changes: 1 addition & 6 deletions arch/arm64/boot/dts/apple/t8103-pmgr.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -725,11 +725,6 @@
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "ans2";
/*
* The ADT makes ps_apcie_st depend on ps_ans2 instead, but this
* doesn't make much sense since ANS2 uses APCIE_ST.
*/
power-domains = <&ps_apcie_st>;
};

ps_gfx: power-controller@3f8 {
Expand Down Expand Up @@ -836,7 +831,7 @@
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "apcie_st";
power-domains = <&ps_apcie>;
power-domains = <&ps_apcie>, <&ps_ans2>;
};

ps_ane_sys: power-controller@470 {
Expand Down
34 changes: 34 additions & 0 deletions arch/arm64/boot/dts/apple/t8103.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -378,6 +378,40 @@
<AIC_IRQ 274 IRQ_TYPE_LEVEL_HIGH>;
};

ans_mbox: mbox@277408000 {
compatible = "apple,t8103-asc-mailbox", "apple,asc-mailbox-v4";
reg = <0x2 0x77408000 0x0 0x4000>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 583 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 584 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 585 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 586 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "send-empty", "send-not-empty",
"recv-empty", "recv-not-empty";
#mbox-cells = <0>;
power-domains = <&ps_ans2>;
};

sart: iommu@27bc50000 {
compatible = "apple,t8103-sart";
reg = <0x2 0x7bc50000 0x0 0x10000>;
power-domains = <&ps_ans2>;
};

nvme@27bcc0000 {
compatible = "apple,t8103-nvme-ans2", "apple,nvme-ans2";
reg = <0x2 0x7bcc0000 0x0 0x40000>,
<0x2 0x77400000 0x0 0x4000>;
reg-names = "nvme", "ans";
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 590 IRQ_TYPE_LEVEL_HIGH>;
mboxes = <&ans_mbox>;
apple,sart = <&sart>;
power-domains = <&ps_ans2>, <&ps_apcie_st>;
power-domain-names = "ans", "apcie0";
resets = <&ps_ans2>;
};

pcie0_dart_0: dart@681008000 {
compatible = "apple,t8103-dart";
reg = <0x6 0x81008000 0x0 0x4000>;
Expand Down
8 changes: 4 additions & 4 deletions arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -599,8 +599,8 @@
compatible = "socionext,uniphier-dwc3", "snps,dwc3";
status = "disabled";
reg = <0x65a00000 0xcd00>;
interrupt-names = "host", "peripheral";
interrupts = <0 134 4>, <0 135 4>;
interrupt-names = "dwc_usb3";
interrupts = <0 134 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb2>;
clock-names = "ref", "bus_early", "suspend";
Expand Down Expand Up @@ -701,8 +701,8 @@
compatible = "socionext,uniphier-dwc3", "snps,dwc3";
status = "disabled";
reg = <0x65c00000 0xcd00>;
interrupt-names = "host", "peripheral";
interrupts = <0 137 4>, <0 138 4>;
interrupt-names = "dwc_usb3";
interrupts = <0 137 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb3>;
clock-names = "ref", "bus_early", "suspend";
Expand Down
13 changes: 11 additions & 2 deletions drivers/reset/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,7 @@ if RESET_CONTROLLER

config RESET_A10SR
tristate "Altera Arria10 System Resource Reset"
depends on MFD_ALTERA_A10SR
depends on MFD_ALTERA_A10SR || COMPILE_TEST
help
This option enables support for the external reset functions for
peripheral PHYs on the Altera Arria10 System Resource Chip.
Expand Down Expand Up @@ -200,8 +200,9 @@ config RESET_SCMI
firmware controlling all the reset signals.

config RESET_SIMPLE
bool "Simple Reset Controller Driver" if COMPILE_TEST
bool "Simple Reset Controller Driver" if COMPILE_TEST || EXPERT
default ARCH_ASPEED || ARCH_BCM4908 || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || (ARCH_INTEL_SOCFPGA && ARM64) || ARCH_SUNXI || ARC
depends on HAS_IOMEM
help
This enables a simple reset controller driver for reset lines that
that can be asserted and deasserted by toggling bits in a contiguous,
Expand Down Expand Up @@ -265,6 +266,14 @@ config RESET_TI_SYSCON
you wish to use the reset framework for such memory-mapped devices,
say Y here. Otherwise, say N.

config RESET_TI_TPS380X
tristate "TI TPS380x Reset Driver"
select GPIOLIB
help
This enables the reset driver support for TI TPS380x devices. If
you wish to use the reset framework for such devices, say Y here.
Otherwise, say N.

config RESET_TN48M_CPLD
tristate "Delta Networks TN48M switch CPLD reset controller"
depends on MFD_TN48M_CPLD || COMPILE_TEST
Expand Down
1 change: 1 addition & 0 deletions drivers/reset/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -34,6 +34,7 @@ obj-$(CONFIG_RESET_SUNPLUS) += reset-sunplus.o
obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o
obj-$(CONFIG_RESET_TI_SYSCON) += reset-ti-syscon.o
obj-$(CONFIG_RESET_TI_TPS380X) += reset-tps380x.o
obj-$(CONFIG_RESET_TN48M_CPLD) += reset-tn48m.o
obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o
obj-$(CONFIG_RESET_UNIPHIER_GLUE) += reset-uniphier-glue.o
Expand Down
126 changes: 126 additions & 0 deletions drivers/reset/reset-tps380x.c
Original file line number Diff line number Diff line change
@@ -0,0 +1,126 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* TI TPS380x Supply Voltage Supervisor and Reset Controller Driver
*
* Copyright (C) 2022 Pengutronix, Marco Felsch <[email protected]>
*
* Based on Simple Reset Controller Driver
*
* Copyright (C) 2017 Pengutronix, Philipp Zabel <[email protected]>
*/

#include <linux/delay.h>
#include <linux/gpio/consumer.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/property.h>
#include <linux/reset-controller.h>

struct tps380x_reset {
struct reset_controller_dev rcdev;
struct gpio_desc *reset_gpio;
unsigned int reset_ms;
};

struct tps380x_reset_devdata {
unsigned int min_reset_ms;
unsigned int typ_reset_ms;
unsigned int max_reset_ms;
};

static inline
struct tps380x_reset *to_tps380x_reset(struct reset_controller_dev *rcdev)
{
return container_of(rcdev, struct tps380x_reset, rcdev);
}

static int
tps380x_reset_assert(struct reset_controller_dev *rcdev, unsigned long id)
{
struct tps380x_reset *tps380x = to_tps380x_reset(rcdev);

gpiod_set_value_cansleep(tps380x->reset_gpio, 1);

return 0;
}

static int
tps380x_reset_deassert(struct reset_controller_dev *rcdev, unsigned long id)
{
struct tps380x_reset *tps380x = to_tps380x_reset(rcdev);

gpiod_set_value_cansleep(tps380x->reset_gpio, 0);
msleep(tps380x->reset_ms);

return 0;
}

static const struct reset_control_ops reset_tps380x_ops = {
.assert = tps380x_reset_assert,
.deassert = tps380x_reset_deassert,
};

static int tps380x_reset_of_xlate(struct reset_controller_dev *rcdev,
const struct of_phandle_args *reset_spec)
{
/* No special handling needed, we have only one reset line per device */
return 0;
}

static int tps380x_reset_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
const struct tps380x_reset_devdata *devdata;
struct tps380x_reset *tps380x;

devdata = device_get_match_data(dev);
if (!devdata)
return -EINVAL;

tps380x = devm_kzalloc(dev, sizeof(*tps380x), GFP_KERNEL);
if (!tps380x)
return -ENOMEM;

tps380x->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
if (IS_ERR(tps380x->reset_gpio))
return dev_err_probe(dev, PTR_ERR(tps380x->reset_gpio),
"Failed to get GPIO\n");

tps380x->reset_ms = devdata->max_reset_ms;

tps380x->rcdev.ops = &reset_tps380x_ops;
tps380x->rcdev.owner = THIS_MODULE;
tps380x->rcdev.dev = dev;
tps380x->rcdev.of_node = dev->of_node;
tps380x->rcdev.of_reset_n_cells = 0;
tps380x->rcdev.of_xlate = tps380x_reset_of_xlate;
tps380x->rcdev.nr_resets = 1;

return devm_reset_controller_register(dev, &tps380x->rcdev);
}

static const struct tps380x_reset_devdata tps3801_reset_data = {
.min_reset_ms = 120,
.typ_reset_ms = 200,
.max_reset_ms = 280,
};

static const struct of_device_id tps380x_reset_dt_ids[] = {
{ .compatible = "ti,tps3801", .data = &tps3801_reset_data },
{ /* sentinel */ },
};
MODULE_DEVICE_TABLE(of, tps380x_reset_dt_ids);

static struct platform_driver tps380x_reset_driver = {
.probe = tps380x_reset_probe,
.driver = {
.name = "tps380x-reset",
.of_match_table = tps380x_reset_dt_ids,
},
};
module_platform_driver(tps380x_reset_driver);

MODULE_AUTHOR("Marco Felsch <[email protected]>");
MODULE_DESCRIPTION("TI TPS380x Supply Voltage Supervisor and Reset Driver");
MODULE_LICENSE("GPL v2");

0 comments on commit fad235e

Please sign in to comment.