RV128A

makigumo · Jan 7, 2017 · 73dccc1 · 73dccc1
1 parent 2a529b9
commit 73dccc1
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Showing 2 changed files with 41 additions and 2 deletions.
diff --git a/README.md b/README.md
@@ -9,7 +9,7 @@ Supported instruction sets:
 * [x] RV32E Base Integer Instruction Set
    * limited to 16 registers
 * [x] RV32M/RV64M/RV128M Standard Extension for Integer Multiplication and Division
-* [x] RV32A/RV64A Standard Extension for Atomic Instructions
+* [x] RV32A/RV64A/RV128A Standard Extension for Atomic Instructions
 * [x] RV32F/RV64F Standard Extension for Single-Precision Floating-Point
 * [x] RV32D/RV64D Standard Extension for Double-Precision Floating-Point
 * [x] RV32Q/RV64Q Standard Extension for Quad-Precision Floating-Point

diff --git a/RISCV/RISCVCtx.m b/RISCV/RISCVCtx.m
@@ -654,7 +654,7 @@ - (int)disassembleSingleInstruction:(DisasmStruct *)disasm usingProcessorMode:(N
             }
             break;
 
-        case OPCODE_OP128
+        case OPCODE_OP128:
             switch(funct7) {
                 case 0b0000000:
                     switch (funct3) {
@@ -1094,6 +1094,45 @@ - (int)disassembleSingleInstruction:(DisasmStruct *)disasm usingProcessorMode:(N
                             break;
                     }
                     break;
+
+                case 0b100 /* RV128A */:
+                    switch (getFunct5(insncode)) {
+                        // RV32A Standard Extension
+                        case 0b00010 /* LR.Q */:
+                            populateLR(disasm, insncode, "lr.q");
+                            break;
+                        case 0b00011 /* SC.Q */:
+                            populateAMO(disasm, insncode, "sc.q");
+                            break;
+                        case 0b00001 /* AMOSWAP.Q */:
+                            populateAMO(disasm, insncode, "amoswap.q");
+                            break;
+                        case 0b00000 /* AMOADD.Q */:
+                            populateAMO(disasm, insncode, "amoadd.q");
+                            break;
+                        case 0b00100 /* AMOXOR.Q */:
+                            populateAMO(disasm, insncode, "amoxor.q");
+                            break;
+                        case 0b01100 /* AMOAND.Q */:
+                            populateAMO(disasm, insncode, "amoand.q");
+                            break;
+                        case 0b01000 /* AMOOR.Q */:
+                            populateAMO(disasm, insncode, "amoor.q");
+                            break;
+                        case 0b10000 /* AMOMIN.Q */:
+                            populateAMO(disasm, insncode, "amomin.q");
+                            break;
+                        case 0b10100 /* AMOMAX.Q */:
+                            populateAMO(disasm, insncode, "amomax.q");
+                            break;
+                        case 0b11000 /* AMOMINU.Q */:
+                            populateAMO(disasm, insncode, "amominu.q");
+                            break;
+                        case 0b11100 /* AMOMAXU.Q */:
+                            populateAMO(disasm, insncode, "amomaxu.q");
+                            break;
+                    }
+                    break;
             }
             break;