Hey, I'm Mark, thanks for checking out my page!
I'm interested in ASIC / FPGA design and computer architecture. Check out my projects in Verilog and C/C++
- San Francisco Bay Area
- in/markdiaz1
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Out-of-Order-CPU
Out-of-Order-CPU PublicTwo-issue Out-of-Order RISC-V CPU designed in Verilog
Verilog
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Digit-Classifier
Digit-Classifier PublicObject Motion Classifier written in C utilizing the STM32
C
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