Skip to content
View markgot's full-sized avatar

Block or report markgot

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse
Showing results

Implementation of post-process coverage, and batch waveform search

Python 15 3 Updated Aug 29, 2021

ideas and eda software for vlsi design

Python 49 13 Updated Mar 7, 2025

A simple 3D rasterizer made from scratch in Python.

Python 110 12 Updated Mar 6, 2024

opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

Verilog 2,231 295 Updated Mar 7, 2025

Icarus Verilog

C++ 2,978 543 Updated Mar 13, 2025

A powerful and user-friendly binary analysis platform!

Python 7,817 1,098 Updated Mar 11, 2025

SoC based on RISC V ISA

Verilog 10 3 Updated Apr 22, 2022

EEZ H24005 programmable bench power supply (powered by Arduino Due)

452 113 Updated Nov 5, 2021

A Python implementation of the Interchangeable Virtual Instrument standard.

Python 55 14 Updated Jul 23, 2020

A Python implementation of the Interchangeable Virtual Instrument standard.

Python 228 127 Updated Aug 7, 2024

Libraries and tools for KiCAD EDA suite

KiCad Layout 17 5 Updated Dec 5, 2021