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Re-commit: [TableGen] AsmMatcher: Fix bug with reported diagnostic fo…
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…r operand.

Summary:
The generated diagnostic by the AsmMatcher isn't always applicable to the AsmOperand.

This is because the code will only update the diagnostic if it is more 
specific than the previous diagnostic. However, when having validated
operands and 'moved on' to a next operand (for some instruction/alias for
which all previous operands are valid), if the diagnostic is InvalidOperand,
than that should be set as the diagnostic, not the more specific message
about a previous operand for some other instruction/alias candidate.

(Re-committed with an extra whitespace in SVEInstrFormats.td to trigger rebuild 
of AArch64GenAsmMatcher.inc, since the llvm-clang-x86_64-expensive-checks-win
builder does not seem to rebuild AArch64GenAsmMatcher.inc with the
newly built TableGen due to a missing dependency somewhere (see:
http://lists.llvm.org/pipermail/llvm-dev/2017-December/119555.html))

Reviewers: craig.topper, olista01, rengolin, stoklund

Reviewed By: olista01

Subscribers: javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D40011



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320711 91177308-0d34-0410-b5e6-96231b3b80d8
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@sdesmalen-arm
sdesmalen-arm committed Dec 14, 2017
1 parent 9b53469 commit 9a94efd
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Showing 4 changed files with 18 additions and 19 deletions.
2 changes: 1 addition & 1 deletion lib/Target/AArch64/SVEInstrFormats.td
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Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@
//===----------------------------------------------------------------------===//

//===----------------------------------------------------------------------===//
// SVE Integer Arithmetic - Unpredicated Group.
// SVE Integer Arithmetic - Unpredicated Group.
//===----------------------------------------------------------------------===//

class sve_int_bin_cons_arit_0<bits<2> sz8_64, bits<3> opc, string asm,
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8 changes: 4 additions & 4 deletions test/MC/AArch64/arm64-diags.s
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Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,7 @@ foo:
ldr x3, [foo + 4]
; CHECK: ldr x3, foo+4 ; encoding: [0bAAA00011,A,A,0x58]
; CHECK: ; fixup A - offset: 0, value: foo+4, kind: fixup_aarch64_ldr_pcrel_imm19
; CHECK-ERRORS: error: expected label or encodable integer pc offset
; CHECK-ERRORS: error: invalid operand for instruction

; The last argument should be flagged as an error. rdar://9576009
ld4.8b {v0, v1, v2, v3}, [x0], #33
Expand Down Expand Up @@ -42,13 +42,13 @@ foo:
; CHECK-ERRORS: error: index must be an integer in range [-256, 255].
; CHECK-ERRORS: ldr x0, [x0, #804]!
; CHECK-ERRORS: ^
; CHECK-ERRORS: error: expected label or encodable integer pc offset
; CHECK-ERRORS: error: invalid operand for instruction
; CHECK-ERRORS: ldr w0, [w0, #301]!
; CHECK-ERRORS: ^
; CHECK-ERRORS: error: index must be an integer in range [-256, 255].
; CHECK-ERRORS: ldr x0, [x0], #804
; CHECK-ERRORS: ^
; CHECK-ERRORS: error: expected label or encodable integer pc offset
; CHECK-ERRORS: error: invalid operand for instruction
; CHECK-ERRORS: ldr w0, [w0], #301
; CHECK-ERRORS: ^
; CHECK-ERRORS: error: index must be a multiple of 4 in range [-256, 252].
Expand Down Expand Up @@ -477,7 +477,7 @@ tlbi vale3
; CHECK-ERRORS: error: too few operands for instruction
; CHECK-ERRORS: b.ne
; CHECK-ERRORS: ^
; CHECK-ERRORS: error: expected label or encodable integer pc offset
; CHECK-ERRORS: error: invalid operand for instruction
; CHECK-ERRORS: b.eq 0, 0
; CHECK-ERRORS: ^

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22 changes: 11 additions & 11 deletions test/MC/AArch64/basic-a64-diagnostics.s
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Original file line number Diff line number Diff line change
Expand Up @@ -1962,8 +1962,8 @@
//------------------------------------------------------------------------------
ldr x3, [x4, #25], #0
ldr x4, [x9, #0], #4
// CHECK-ERROR-AARCH64: error: {{expected symbolic reference or integer|index must be a multiple of 8}} in range [0, 32760]
// CHECK-ERROR-ARM64: error: expected label or encodable integer pc offset
// CHECK-ERROR-AARCH64: error: invalid operand for instruction
// CHECK-ERROR-ARM64: error: invalid operand for instruction
// CHECK-ERROR-NEXT: ldr x3, [x4, #25], #0
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-AARCH64-NEXT: error: expected label or encodable integer pc offset
Expand Down Expand Up @@ -2196,7 +2196,7 @@
// CHECK-ERROR-NEXT: error: {{expected|index must be an}} integer in range [-256, 255]
// CHECK-ERROR-NEXT: ldrh w9, [sp, #-257]!
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected label or encodable integer pc offset
// CHECK-ERROR-NEXT: error: invalid operand for instruction
// CHECK-ERROR-NEXT: ldr w1, [x19, #256]!
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: {{expected|index must be an}} integer in range [-256, 255]
Expand All @@ -2221,7 +2221,7 @@
// CHECK-ERROR-NEXT: error: {{expected|index must be an}} integer in range [-256, 255]
// CHECK-ERROR-NEXT: ldrsh x22, [x13, #-257]!
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected label or encodable integer pc offset
// CHECK-ERROR-NEXT: error: invalid operand for instruction
// CHECK-ERROR-NEXT: ldrsw x2, [x3, #256]!
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: {{expected|index must be an}} integer in range [-256, 255]
Expand Down Expand Up @@ -2298,13 +2298,13 @@
// CHECK-ERROR-NEXT: error: {{expected|index must be an}} integer in range [-256, 255]
// CHECK-ERROR-NEXT: ldr h3, [x13, #-257]!
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected label or encodable integer pc offset
// CHECK-ERROR-NEXT: error: invalid operand for instruction
// CHECK-ERROR-NEXT: ldr s3, [x3, #256]!
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: {{expected|index must be an}} integer in range [-256, 255]
// CHECK-ERROR-NEXT: ldr s3, [x13, #-257]!
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected label or encodable integer pc offset
// CHECK-ERROR-NEXT: error: invalid operand for instruction
// CHECK-ERROR-NEXT: ldr d3, [x3, #256]!
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: {{expected|index must be an}} integer in range [-256, 255]
Expand Down Expand Up @@ -2397,7 +2397,7 @@
//// 32-bit addresses
ldr w0, [w20]
ldrsh x3, [wsp]
// CHECK-ERROR: error: expected label or encodable integer pc offset
// CHECK-ERROR: error: invalid operand for instruction
// CHECK-ERROR-NEXT: ldr w0, [w20]
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: invalid operand for instruction
Expand Down Expand Up @@ -2435,7 +2435,7 @@
// CHECK-ERROR-ARM64-NEXT: error: prefetch operand out of range, [0,31] expected
// CHECK-ERROR-NEXT: prfm #32, [sp, #8]
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected label or encodable integer pc offset
// CHECK-ERROR-NEXT: error: invalid operand for instruction
// CHECK-ERROR-NEXT: prfm pldl1strm, [w3, #8]
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-AARCH64-NEXT: error: operand specifier not recognised
Expand All @@ -2453,7 +2453,7 @@
ldr w10, [x6, x9, sxtw #2]
ldr w11, [x7, w2, lsl #2]
ldr w12, [x8, w1, sxtx]
// CHECK-ERROR-NEXT: error: expected label or encodable integer pc offset
// CHECK-ERROR-NEXT: error: invalid operand for instruction
// CHECK-ERROR-NEXT: ldr w3, [xzr, x3]
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected #imm after shift specifier
Expand Down Expand Up @@ -3106,10 +3106,10 @@
movk w3, #:abs_g0:sym
movz x3, #:abs_g0_nc:sym
movn x4, #:abs_g0_nc:sym
// CHECK-ERROR: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
// CHECK-ERROR: error: invalid operand for instruction
// CHECK-ERROR-NEXT: movz x12, #:abs_g0:sym, lsl #16
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
// CHECK-ERROR: error: invalid operand for instruction
// CHECK-ERROR-NEXT: movz x12, #:abs_g0:sym, lsl #0
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-AARCH64-NEXT: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
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5 changes: 2 additions & 3 deletions utils/TableGen/AsmMatcherEmitter.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -3402,10 +3402,9 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
OS << " // target predicate, that diagnostic is preferred.\n";
OS << " if (!HadMatchOtherThanPredicate &&\n";
OS << " (it == MnemonicRange.first || ErrorInfo <= ActualIdx)) {\n";
OS << " ErrorInfo = ActualIdx;\n";
OS << " // InvalidOperand is the default. Prefer specificity.\n";
OS << " if (Diag != Match_InvalidOperand)\n";
OS << " if (Diag != Match_InvalidOperand || ErrorInfo != ActualIdx)\n";
OS << " RetCode = Diag;\n";
OS << " ErrorInfo = ActualIdx;\n";
OS << " }\n";
OS << " // Otherwise, just reject this instance of the mnemonic.\n";
OS << " OperandsValid = false;\n";
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