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[X86] Rearrange some of the code around AVX512 sign/zero extends. NFCI
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Move the AVX512 code out of LowerAVXExtend. LowerAVXExtend has two callers but one of them pre-checks for AVX-512 so the code is only live from the other caller. So move the AVX-512 checks up to that caller for symmetry.

Move all of the i1 input type code in Lower_AVX512ZeroExend together.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319724 91177308-0d34-0410-b5e6-96231b3b80d8
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topperc committed Dec 5, 2017
1 parent 5eb4649 commit b65db5e
Showing 1 changed file with 12 additions and 12 deletions.
24 changes: 12 additions & 12 deletions lib/Target/X86/X86ISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -16086,9 +16086,6 @@ static SDValue LowerAVXExtend(SDValue Op, SelectionDAG &DAG,
MVT InVT = In.getSimpleValueType();
SDLoc dl(Op);

if (VT.is512BitVector() || InVT.getVectorElementType() == MVT::i1)
return DAG.getNode(ISD::ZERO_EXTEND, dl, VT, In);

// Optimize vectors in AVX mode:
//
// v8i16 -> v8i32
Expand Down Expand Up @@ -16158,6 +16155,13 @@ static SDValue LowerZERO_EXTEND_AVX512(SDValue Op,

static SDValue LowerANY_EXTEND(SDValue Op, const X86Subtarget &Subtarget,
SelectionDAG &DAG) {
MVT VT = Op->getSimpleValueType(0);
SDValue In = Op->getOperand(0);
MVT InVT = In.getSimpleValueType();

if (VT.is512BitVector() || InVT.getVectorElementType() == MVT::i1)
return DAG.getNode(ISD::ZERO_EXTEND, SDLoc(Op), VT, In);

if (Subtarget.hasFp256())
if (SDValue Res = LowerAVXExtend(Op, DAG, Subtarget))
return Res;
Expand All @@ -16167,7 +16171,6 @@ static SDValue LowerANY_EXTEND(SDValue Op, const X86Subtarget &Subtarget,

static SDValue LowerZERO_EXTEND(SDValue Op, const X86Subtarget &Subtarget,
SelectionDAG &DAG) {
SDLoc DL(Op);
MVT VT = Op.getSimpleValueType();
SDValue In = Op.getOperand(0);
MVT SVT = In.getSimpleValueType();
Expand Down Expand Up @@ -18268,14 +18271,6 @@ static SDValue LowerSIGN_EXTEND_AVX512(SDValue Op,
MVT InVTElt = InVT.getVectorElementType();
SDLoc dl(Op);

// SKX processor
if ((InVTElt == MVT::i1) &&
(((Subtarget.hasBWI() && VTElt.getSizeInBits() <= 16)) ||

((Subtarget.hasDQI() && VTElt.getSizeInBits() >= 32))))

return DAG.getNode(X86ISD::VSEXT, dl, VT, In);

unsigned NumElts = VT.getVectorNumElements();

if (VT.is512BitVector() && InVTElt != MVT::i1 &&
Expand All @@ -18288,6 +18283,11 @@ static SDValue LowerSIGN_EXTEND_AVX512(SDValue Op,
if (InVTElt != MVT::i1)
return SDValue();

// SKX processor
if (((Subtarget.hasBWI() && VTElt.getSizeInBits() <= 16)) ||
((Subtarget.hasDQI() && VTElt.getSizeInBits() >= 32)))
return DAG.getNode(X86ISD::VSEXT, dl, VT, In);

MVT ExtVT = VT;
if (!VT.is512BitVector() && !Subtarget.hasVLX()) {
ExtVT = MVT::getVectorVT(MVT::getIntegerVT(512/NumElts), NumElts);
Expand Down

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