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ARM: dts: add SKOV imx6q and imx6dl based boards
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Add SKOV imx6q/dl LT2, LT6 and mi1010ait-1cp1 boards.

Signed-off-by: Sam Ravnborg <[email protected]>
Signed-off-by: Søren Andersen <[email protected]>
Signed-off-by: Juergen Borleis <[email protected]>
Signed-off-by: Ulrich Ölmann <[email protected]>
Signed-off-by: Michael Grzeschik <[email protected]>
Signed-off-by: Marco Felsch <[email protected]>
Signed-off-by: Lucas Stach <[email protected]>
Signed-off-by: Oleksij Rempel <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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sravnborg authored and Shawn Guo committed Aug 14, 2021
1 parent 0c4d733 commit b111135
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5 changes: 5 additions & 0 deletions arch/arm/boot/dts/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -476,6 +476,8 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6dl-sabrelite.dtb \
imx6dl-sabresd.dtb \
imx6dl-savageboard.dtb \
imx6dl-skov-revc-lt2.dtb \
imx6dl-skov-revc-lt6.dtb \
imx6dl-solidsense.dtb \
imx6dl-ts4900.dtb \
imx6dl-ts7970.dtb \
Expand Down Expand Up @@ -577,6 +579,9 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-sabresd.dtb \
imx6q-savageboard.dtb \
imx6q-sbc6x.dtb \
imx6q-skov-revc-lt2.dtb \
imx6q-skov-revc-lt6.dtb \
imx6q-skov-reve-mi1010ait-1cp1.dtb \
imx6q-solidsense.dtb \
imx6q-tbs2910.dtb \
imx6q-ts4900.dtb \
Expand Down
13 changes: 13 additions & 0 deletions arch/arm/boot/dts/imx6dl-skov-revc-lt2.dts
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
//
// Copyright (C) 2020 Pengutronix, Ulrich Oelmann <[email protected]>

/dts-v1/;
#include "imx6dl.dtsi"
#include "imx6qdl-skov-cpu.dtsi"
#include "imx6qdl-skov-cpu-revc.dtsi"

/ {
model = "SKOV IMX6 CPU SoloCore";
compatible = "skov,imx6dl-skov-revc-lt2", "fsl,imx6dl";
};
106 changes: 106 additions & 0 deletions arch/arm/boot/dts/imx6dl-skov-revc-lt6.dts
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
//
// Copyright (C) 2020 Pengutronix, Ulrich Oelmann <[email protected]>

/dts-v1/;
#include "imx6dl.dtsi"
#include "imx6qdl-skov-cpu.dtsi"
#include "imx6qdl-skov-cpu-revc.dtsi"

/ {
model = "SKOV IMX6 CPU SoloCore";
compatible = "skov,imx6dl-skov-revc-lt6", "fsl,imx6dl";

backlight: backlight {
compatible = "pwm-backlight";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_backlight>;
enable-gpios = <&gpio6 23 GPIO_ACTIVE_LOW>;
pwms = <&pwm2 0 20000 0>;
brightness-levels = <0 255>;
num-interpolated-steps = <17>;
default-brightness-level = <8>;
power-supply = <&reg_24v0>;
};

display {
compatible = "fsl,imx-parallel-display";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu1>;
#address-cells = <1>;
#size-cells = <0>;

port@0 {
reg = <0>;

display0_in: endpoint {
remote-endpoint = <&ipu1_di0_disp0>;
};
};

port@1 {
reg = <1>;

display0_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};

panel {
compatible = "logictechno,lttd800480070-l6wh-rt";
backlight = <&backlight>;
power-supply = <&reg_3v3>;

port {
panel_in: endpoint {
remote-endpoint = <&display0_out>;
};
};
};
};

&ipu1_di0_disp0 {
remote-endpoint = <&display0_in>;
};

&iomuxc {
pinctrl_backlight: backlightgrp {
fsl,pins = <
MX6QDL_PAD_RGMII_TD3__GPIO6_IO23 0x58
>;
};

pinctrl_ipu1: ipu1grp {
fsl,pins = <
MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
>;
};
};
36 changes: 36 additions & 0 deletions arch/arm/boot/dts/imx6q-skov-revc-lt2.dts
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
//
// Copyright (C) 2020 Pengutronix, Ulrich Oelmann <[email protected]>

/dts-v1/;
#include "imx6q.dtsi"
#include "imx6qdl-skov-cpu.dtsi"
#include "imx6qdl-skov-cpu-revc.dtsi"

/ {
model = "SKOV IMX6 CPU QuadCore";
compatible = "skov,imx6q-skov-revc-lt2", "fsl,imx6q";
};

&hdmi {
ddc-i2c-bus = <&i2c2>;
status = "okay";
};

&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
clock-frequency = <100000>;
status = "okay";
};

&iomuxc {
pinctrl_i2c2: i2c2grp {
fsl,pins = <
/* internal 22 k pull up required */
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001f878
/* internal 22 k pull up required */
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001f878
>;
};
};
128 changes: 128 additions & 0 deletions arch/arm/boot/dts/imx6q-skov-revc-lt6.dts
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@@ -0,0 +1,128 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
//
// Copyright (C) 2020 Pengutronix, Ulrich Oelmann <[email protected]>

/dts-v1/;
#include "imx6q.dtsi"
#include "imx6qdl-skov-cpu.dtsi"
#include "imx6qdl-skov-cpu-revc.dtsi"

/ {
model = "SKOV IMX6 CPU QuadCore";
compatible = "skov,imx6q-skov-revc-lt6", "fsl,imx6q";

backlight: backlight {
compatible = "pwm-backlight";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_backlight>;
enable-gpios = <&gpio6 23 GPIO_ACTIVE_LOW>;
pwms = <&pwm2 0 20000 0>;
brightness-levels = <0 255>;
num-interpolated-steps = <17>;
default-brightness-level = <8>;
power-supply = <&reg_24v0>;
};

display {
#address-cells = <1>;
#size-cells = <0>;

compatible = "fsl,imx-parallel-display";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu1>;

port@0 {
reg = <0>;

display0_in: endpoint {
remote-endpoint = <&ipu1_di0_disp0>;
};
};

port@1 {
reg = <1>;

display0_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};

panel {
compatible = "logictechno,lttd800480070-l6wh-rt";
backlight = <&backlight>;
power-supply = <&reg_3v3>;

port {
panel_in: endpoint {
remote-endpoint = <&display0_out>;
};
};
};
};

&hdmi {
ddc-i2c-bus = <&i2c2>;
status = "okay";
};

&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
clock-frequency = <100000>;
status = "okay";
};

&ipu1_di0_disp0 {
remote-endpoint = <&display0_in>;
};

&iomuxc {
pinctrl_backlight: backlightgrp {
fsl,pins = <
MX6QDL_PAD_RGMII_TD3__GPIO6_IO23 0x58
>;
};

pinctrl_i2c2: i2c2grp {
fsl,pins = <
/* internal 22 k pull up required */
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001F878
/* internal 22 k pull up required */
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001F878
>;
};

pinctrl_ipu1: ipu1grp {
fsl,pins = <
MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
>;
};
};
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