Support for AT90PWM3B (#14)

* Added support for AT90PWM3B. Renamed UBRR to _UBRR to avoid conflict with register which already exists in AT90PWM3B.

* Put guards around io defines

yaMBSiavr.c

@@ -194,7 +194,7 @@ void modbusTickTimer(void)
 					BusState=(1<<ReceiveCompleted);
 				} else modbusReset();
 				#endif
-			}	
+			}
 		} else if (modbusTimer==modbusInterFrameDelayReceiveStart) BusState|=(1<<BusTimedOut);
 	}
 }
@@ -242,8 +242,8 @@ ISR(UART_TRANSMIT_COMPLETE_INTERRUPT)
 
 void modbusInit(void)
 {
-	UBRRH = (unsigned char)((UBRR) >> 8);
-	UBRRL = (unsigned char) UBRR;
+	UBRRH = (unsigned char)((_UBRR) >> 8);
+	UBRRL = (unsigned char) _UBRR;
 	UART_STATUS = (1<<U2X); //double speed mode.
 #ifdef URSEL   // if UBRRH and UCSRC share the same I/O location , e.g. ATmega8
 	UCSRC = (1<<URSEL)|(3<<UCSZ0); //Frame Size

yaMBSiavr.h

@@ -51,14 +51,24 @@ THE POSSIBILITY OF SUCH DAMAGE.
  */
 
 /* define baudrate of modbus */
-#define BAUD 38400L 
+#ifndef BAUD
+#define BAUD 38400L
+#endif
 
 /*
 * Definitions for transceiver enable pin.
 */
+#ifndef TRANSCEIVER_ENABLE_PORT
 #define TRANSCEIVER_ENABLE_PORT PORTD
+#endif
+
+#ifndef TRANSCEIVER_ENABLE_PIN
 #define TRANSCEIVER_ENABLE_PIN 2
+#endif
+
+#ifndef TRANSCEIVER_ENABLE_PORT_DDR
 #define TRANSCEIVER_ENABLE_PORT_DDR DDRD
+#endif
 
 /**
  * @brief    
@@ -156,14 +166,24 @@ THE POSSIBILITY OF SUCH DAMAGE.
 #define UART_DATA     UDR
 #define UART_UDRIE    UDRIE
 
+#elif defined(__AVR_AT90PWM3B__)
+#define UART_TRANSMIT_COMPLETE_INTERRUPT USART_TX_vect
+#define UART_RECEIVE_INTERRUPT   USART_RX_vect
+#define UART_TRANSMIT_INTERRUPT  USART_UDRE_vect
+#define UART_STATUS   UCSRA
+#define UART_CONTROL  UCSRB
+#define UART_DATA     UDR
+#define UART_UDRIE    UDRIE
+
+
 #else
 #error "no definition available"
 #endif
 
 #ifndef F_CPU
 #error " F_CPU not defined "
 #else
-   #define UBRR (F_CPU / 8 / BAUD ) -1 
+   #define _UBRR (F_CPU / 8 / BAUD ) -1
 #endif /* F_CPU */
 /*
  * Available address modes.