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[X86] [AVX512] Minor fix in encoding of scalar EVEX instructions. NFC.
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Commit on behalf of Gadi Haber  

Removed EVEX_V512 prefix from scalar EVEX instructions since HW ignores L'L bits anyway (LIG). 4 instructions are modified.
The changed encodings are validated with XED.
Rviewers: delena, igorb

Differential revision: https://reviews.llvm.org/D27802


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290065 91177308-0d34-0410-b5e6-96231b3b80d8
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@michaelz-eng
michaelz-eng committed Dec 18, 2016
1 parent 06557aa commit 1a2b5e0
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Showing 3 changed files with 38 additions and 39 deletions.
5 changes: 2 additions & 3 deletions lib/Target/X86/X86InstrAVX512.td
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Original file line number Diff line number Diff line change
Expand Up @@ -6107,8 +6107,7 @@ multiclass avx512_cvt_fp_scalar_sd2ss<bits<8> opc, string OpcodeStr,
let Predicates = [HasAVX512] in {
defm Z : avx512_cvt_fp_scalar<opc, OpcodeStr, _dst, _src, OpNodeRnd>,
avx512_cvt_fp_rc_scalar<opc, OpcodeStr, _dst, _src,
OpNodeRnd>, VEX_W, EVEX_CD8<64, CD8VT1>,
EVEX_V512, XD;
OpNodeRnd>, VEX_W, EVEX_CD8<64, CD8VT1>, XD;
}
}

Expand All @@ -6118,7 +6117,7 @@ multiclass avx512_cvt_fp_scalar_ss2sd<bits<8> opc, string OpcodeStr,
let Predicates = [HasAVX512] in {
defm Z : avx512_cvt_fp_scalar<opc, OpcodeStr, _dst, _src, OpNodeRnd>,
avx512_cvt_fp_sae_scalar<opc, OpcodeStr, _dst, _src, OpNodeRnd>,
EVEX_CD8<32, CD8VT1>, XS, EVEX_V512;
EVEX_CD8<32, CD8VT1>, XS;
}
}
defm VCVTSD2SS : avx512_cvt_fp_scalar_sd2ss<0x5A, "vcvtsd2ss",
Expand Down
36 changes: 18 additions & 18 deletions test/MC/X86/avx512-encodings.s
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Original file line number Diff line number Diff line change
Expand Up @@ -16441,15 +16441,15 @@ vpermilpd $0x23, 0x400(%rbx), %zmm2
vcvttpd2dq -1032(%rdx){1to8}, %ymm27

// CHECK: vcvtsd2ss %xmm12, %xmm9, %xmm17
// CHECK: encoding: [0x62,0xc1,0xb7,0x48,0x5a,0xcc]
// CHECK: encoding: [0x62,0xc1,0xb7,0x08,0x5a,0xcc]
vcvtsd2ss %xmm12, %xmm9, %xmm17

// CHECK: vcvtsd2ss %xmm12, %xmm9, %xmm17 {%k6}
// CHECK: encoding: [0x62,0xc1,0xb7,0x4e,0x5a,0xcc]
// CHECK: encoding: [0x62,0xc1,0xb7,0x0e,0x5a,0xcc]
vcvtsd2ss %xmm12, %xmm9, %xmm17 {%k6}

// CHECK: vcvtsd2ss %xmm12, %xmm9, %xmm17 {%k6} {z}
// CHECK: encoding: [0x62,0xc1,0xb7,0xce,0x5a,0xcc]
// CHECK: encoding: [0x62,0xc1,0xb7,0x8e,0x5a,0xcc]
vcvtsd2ss %xmm12, %xmm9, %xmm17 {%k6} {z}

// CHECK: vcvtsd2ss {rn-sae}, %xmm12, %xmm9, %xmm17
Expand All @@ -16469,67 +16469,67 @@ vpermilpd $0x23, 0x400(%rbx), %zmm2
vcvtsd2ss {rz-sae}, %xmm12, %xmm9, %xmm17

// CHECK: vcvtsd2ss (%rcx), %xmm9, %xmm17
// CHECK: encoding: [0x62,0xe1,0xb7,0x48,0x5a,0x09]
// CHECK: encoding: [0x62,0xe1,0xb7,0x08,0x5a,0x09]
vcvtsd2ss (%rcx), %xmm9, %xmm17

// CHECK: vcvtsd2ss 291(%rax,%r14,8), %xmm9, %xmm17
// CHECK: encoding: [0x62,0xa1,0xb7,0x48,0x5a,0x8c,0xf0,0x23,0x01,0x00,0x00]
// CHECK: encoding: [0x62,0xa1,0xb7,0x08,0x5a,0x8c,0xf0,0x23,0x01,0x00,0x00]
vcvtsd2ss 291(%rax,%r14,8), %xmm9, %xmm17

// CHECK: vcvtsd2ss 1016(%rdx), %xmm9, %xmm17
// CHECK: encoding: [0x62,0xe1,0xb7,0x48,0x5a,0x4a,0x7f]
// CHECK: encoding: [0x62,0xe1,0xb7,0x08,0x5a,0x4a,0x7f]
vcvtsd2ss 1016(%rdx), %xmm9, %xmm17

// CHECK: vcvtsd2ss 1024(%rdx), %xmm9, %xmm17
// CHECK: encoding: [0x62,0xe1,0xb7,0x48,0x5a,0x8a,0x00,0x04,0x00,0x00]
// CHECK: encoding: [0x62,0xe1,0xb7,0x08,0x5a,0x8a,0x00,0x04,0x00,0x00]
vcvtsd2ss 1024(%rdx), %xmm9, %xmm17

// CHECK: vcvtsd2ss -1024(%rdx), %xmm9, %xmm17
// CHECK: encoding: [0x62,0xe1,0xb7,0x48,0x5a,0x4a,0x80]
// CHECK: encoding: [0x62,0xe1,0xb7,0x08,0x5a,0x4a,0x80]
vcvtsd2ss -1024(%rdx), %xmm9, %xmm17

// CHECK: vcvtsd2ss -1032(%rdx), %xmm9, %xmm17
// CHECK: encoding: [0x62,0xe1,0xb7,0x48,0x5a,0x8a,0xf8,0xfb,0xff,0xff]
// CHECK: encoding: [0x62,0xe1,0xb7,0x08,0x5a,0x8a,0xf8,0xfb,0xff,0xff]
vcvtsd2ss -1032(%rdx), %xmm9, %xmm17

// CHECK: vcvtss2sd %xmm6, %xmm6, %xmm28
// CHECK: encoding: [0x62,0x61,0x4e,0x48,0x5a,0xe6]
// CHECK: encoding: [0x62,0x61,0x4e,0x08,0x5a,0xe6]
vcvtss2sd %xmm6, %xmm6, %xmm28

// CHECK: vcvtss2sd %xmm6, %xmm6, %xmm28 {%k3}
// CHECK: encoding: [0x62,0x61,0x4e,0x4b,0x5a,0xe6]
// CHECK: encoding: [0x62,0x61,0x4e,0x0b,0x5a,0xe6]
vcvtss2sd %xmm6, %xmm6, %xmm28 {%k3}

// CHECK: vcvtss2sd %xmm6, %xmm6, %xmm28 {%k3} {z}
// CHECK: encoding: [0x62,0x61,0x4e,0xcb,0x5a,0xe6]
// CHECK: encoding: [0x62,0x61,0x4e,0x8b,0x5a,0xe6]
vcvtss2sd %xmm6, %xmm6, %xmm28 {%k3} {z}

// CHECK: vcvtss2sd {sae}, %xmm6, %xmm6, %xmm28
// CHECK: encoding: [0x62,0x61,0x4e,0x18,0x5a,0xe6]
vcvtss2sd {sae}, %xmm6, %xmm6, %xmm28

// CHECK: vcvtss2sd (%rcx), %xmm6, %xmm28
// CHECK: encoding: [0x62,0x61,0x4e,0x48,0x5a,0x21]
// CHECK: encoding: [0x62,0x61,0x4e,0x08,0x5a,0x21]
vcvtss2sd (%rcx), %xmm6, %xmm28

// CHECK: vcvtss2sd 291(%rax,%r14,8), %xmm6, %xmm28
// CHECK: encoding: [0x62,0x21,0x4e,0x48,0x5a,0xa4,0xf0,0x23,0x01,0x00,0x00]
// CHECK: encoding: [0x62,0x21,0x4e,0x08,0x5a,0xa4,0xf0,0x23,0x01,0x00,0x00]
vcvtss2sd 291(%rax,%r14,8), %xmm6, %xmm28

// CHECK: vcvtss2sd 508(%rdx), %xmm6, %xmm28
// CHECK: encoding: [0x62,0x61,0x4e,0x48,0x5a,0x62,0x7f]
// CHECK: encoding: [0x62,0x61,0x4e,0x08,0x5a,0x62,0x7f]
vcvtss2sd 508(%rdx), %xmm6, %xmm28

// CHECK: vcvtss2sd 512(%rdx), %xmm6, %xmm28
// CHECK: encoding: [0x62,0x61,0x4e,0x48,0x5a,0xa2,0x00,0x02,0x00,0x00]
// CHECK: encoding: [0x62,0x61,0x4e,0x08,0x5a,0xa2,0x00,0x02,0x00,0x00]
vcvtss2sd 512(%rdx), %xmm6, %xmm28

// CHECK: vcvtss2sd -512(%rdx), %xmm6, %xmm28
// CHECK: encoding: [0x62,0x61,0x4e,0x48,0x5a,0x62,0x80]
// CHECK: encoding: [0x62,0x61,0x4e,0x08,0x5a,0x62,0x80]
vcvtss2sd -512(%rdx), %xmm6, %xmm28

// CHECK: vcvtss2sd -516(%rdx), %xmm6, %xmm28
// CHECK: encoding: [0x62,0x61,0x4e,0x48,0x5a,0xa2,0xfc,0xfd,0xff,0xff]
// CHECK: encoding: [0x62,0x61,0x4e,0x08,0x5a,0xa2,0xfc,0xfd,0xff,0xff]
vcvtss2sd -516(%rdx), %xmm6, %xmm28

// CHECK: vcvtsd2si {rn-sae}, %xmm7, %eax
Expand Down
36 changes: 18 additions & 18 deletions test/MC/X86/intel-syntax-avx512.s
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Original file line number Diff line number Diff line change
Expand Up @@ -2046,15 +2046,15 @@ vaddpd zmm1, zmm1, zmm2, {rz-sae}
vcvtsd2si r8, xmm10, {rz-sae}

// CHECK: vcvtsd2ss xmm17, xmm9, xmm12
// CHECK: encoding: [0x62,0xc1,0xb7,0x48,0x5a,0xcc]
// CHECK: encoding: [0x62,0xc1,0xb7,0x08,0x5a,0xcc]
vcvtsd2ss xmm17, xmm9, xmm12

// CHECK: vcvtsd2ss xmm17 {k6}, xmm9, xmm12
// CHECK: encoding: [0x62,0xc1,0xb7,0x4e,0x5a,0xcc]
// CHECK: encoding: [0x62,0xc1,0xb7,0x0e,0x5a,0xcc]
vcvtsd2ss xmm17 {k6}, xmm9, xmm12

// CHECK: vcvtsd2ss xmm17 {k6} {z}, xmm9, xmm12
// CHECK: encoding: [0x62,0xc1,0xb7,0xce,0x5a,0xcc]
// CHECK: encoding: [0x62,0xc1,0xb7,0x8e,0x5a,0xcc]
vcvtsd2ss xmm17 {k6} {z}, xmm9, xmm12

// CHECK: vcvtsd2ss xmm17, xmm9, xmm12, {rn-sae}
Expand All @@ -2074,27 +2074,27 @@ vaddpd zmm1, zmm1, zmm2, {rz-sae}
vcvtsd2ss xmm17, xmm9, xmm12, {rz-sae}

// CHECK: vcvtsd2ss xmm17, xmm9, qword ptr [rcx]
// CHECK: encoding: [0x62,0xe1,0xb7,0x48,0x5a,0x09]
// CHECK: encoding: [0x62,0xe1,0xb7,0x08,0x5a,0x09]
vcvtsd2ss xmm17, xmm9, qword ptr [rcx]

// CHECK: vcvtsd2ss xmm17, xmm9, qword ptr [rax + 8*r14 + 291]
// CHECK: encoding: [0x62,0xa1,0xb7,0x48,0x5a,0x8c,0xf0,0x23,0x01,0x00,0x00]
// CHECK: encoding: [0x62,0xa1,0xb7,0x08,0x5a,0x8c,0xf0,0x23,0x01,0x00,0x00]
vcvtsd2ss xmm17, xmm9, qword ptr [rax + 8*r14 + 291]

// CHECK: vcvtsd2ss xmm17, xmm9, qword ptr [rdx + 1016]
// CHECK: encoding: [0x62,0xe1,0xb7,0x48,0x5a,0x4a,0x7f]
// CHECK: encoding: [0x62,0xe1,0xb7,0x08,0x5a,0x4a,0x7f]
vcvtsd2ss xmm17, xmm9, qword ptr [rdx + 1016]

// CHECK: vcvtsd2ss xmm17, xmm9, qword ptr [rdx + 1024]
// CHECK: encoding: [0x62,0xe1,0xb7,0x48,0x5a,0x8a,0x00,0x04,0x00,0x00]
// CHECK: encoding: [0x62,0xe1,0xb7,0x08,0x5a,0x8a,0x00,0x04,0x00,0x00]
vcvtsd2ss xmm17, xmm9, qword ptr [rdx + 1024]

// CHECK: vcvtsd2ss xmm17, xmm9, qword ptr [rdx - 1024]
// CHECK: encoding: [0x62,0xe1,0xb7,0x48,0x5a,0x4a,0x80]
// CHECK: encoding: [0x62,0xe1,0xb7,0x08,0x5a,0x4a,0x80]
vcvtsd2ss xmm17, xmm9, qword ptr [rdx - 1024]

// CHECK: vcvtsd2ss xmm17, xmm9, qword ptr [rdx - 1032]
// CHECK: encoding: [0x62,0xe1,0xb7,0x48,0x5a,0x8a,0xf8,0xfb,0xff,0xff]
// CHECK: encoding: [0x62,0xe1,0xb7,0x08,0x5a,0x8a,0xf8,0xfb,0xff,0xff]
vcvtsd2ss xmm17, xmm9, qword ptr [rdx - 1032]

// CHECK: vcvtsi2sd xmm7, xmm10, eax
Expand Down Expand Up @@ -2346,43 +2346,43 @@ vaddpd zmm1, zmm1, zmm2, {rz-sae}
vcvtsi2ss xmm16, xmm10, qword ptr [rdx - 1032]

// CHECK: vcvtss2sd xmm28, xmm6, xmm6
// CHECK: encoding: [0x62,0x61,0x4e,0x48,0x5a,0xe6]
// CHECK: encoding: [0x62,0x61,0x4e,0x08,0x5a,0xe6]
vcvtss2sd xmm28, xmm6, xmm6

// CHECK: vcvtss2sd xmm28 {k3}, xmm6, xmm6
// CHECK: encoding: [0x62,0x61,0x4e,0x4b,0x5a,0xe6]
// CHECK: encoding: [0x62,0x61,0x4e,0x0b,0x5a,0xe6]
vcvtss2sd xmm28 {k3}, xmm6, xmm6

// CHECK: vcvtss2sd xmm28 {k3} {z}, xmm6, xmm6
// CHECK: encoding: [0x62,0x61,0x4e,0xcb,0x5a,0xe6]
// CHECK: encoding: [0x62,0x61,0x4e,0x8b,0x5a,0xe6]
vcvtss2sd xmm28 {k3} {z}, xmm6, xmm6

// CHECK: vcvtss2sd xmm28, xmm6, xmm6, {sae}
// CHECK: encoding: [0x62,0x61,0x4e,0x18,0x5a,0xe6]
vcvtss2sd xmm28, xmm6, xmm6, {sae}

// CHECK: vcvtss2sd xmm28, xmm6, dword ptr [rcx]
// CHECK: encoding: [0x62,0x61,0x4e,0x48,0x5a,0x21]
// CHECK: encoding: [0x62,0x61,0x4e,0x08,0x5a,0x21]
vcvtss2sd xmm28, xmm6, dword ptr [rcx]

// CHECK: vcvtss2sd xmm28, xmm6, dword ptr [rax + 8*r14 + 291]
// CHECK: encoding: [0x62,0x21,0x4e,0x48,0x5a,0xa4,0xf0,0x23,0x01,0x00,0x00]
// CHECK: encoding: [0x62,0x21,0x4e,0x08,0x5a,0xa4,0xf0,0x23,0x01,0x00,0x00]
vcvtss2sd xmm28, xmm6, dword ptr [rax + 8*r14 + 291]

// CHECK: vcvtss2sd xmm28, xmm6, dword ptr [rdx + 508]
// CHECK: encoding: [0x62,0x61,0x4e,0x48,0x5a,0x62,0x7f]
// CHECK: encoding: [0x62,0x61,0x4e,0x08,0x5a,0x62,0x7f]
vcvtss2sd xmm28, xmm6, dword ptr [rdx + 508]

// CHECK: vcvtss2sd xmm28, xmm6, dword ptr [rdx + 512]
// CHECK: encoding: [0x62,0x61,0x4e,0x48,0x5a,0xa2,0x00,0x02,0x00,0x00]
// CHECK: encoding: [0x62,0x61,0x4e,0x08,0x5a,0xa2,0x00,0x02,0x00,0x00]
vcvtss2sd xmm28, xmm6, dword ptr [rdx + 512]

// CHECK: vcvtss2sd xmm28, xmm6, dword ptr [rdx - 512]
// CHECK: encoding: [0x62,0x61,0x4e,0x48,0x5a,0x62,0x80]
// CHECK: encoding: [0x62,0x61,0x4e,0x08,0x5a,0x62,0x80]
vcvtss2sd xmm28, xmm6, dword ptr [rdx - 512]

// CHECK: vcvtss2sd xmm28, xmm6, dword ptr [rdx - 516]
// CHECK: encoding: [0x62,0x61,0x4e,0x48,0x5a,0xa2,0xfc,0xfd,0xff,0xff]
// CHECK: encoding: [0x62,0x61,0x4e,0x08,0x5a,0xa2,0xfc,0xfd,0xff,0xff]
vcvtss2sd xmm28, xmm6, dword ptr [rdx - 516]

// CHECK: vcvtss2si eax, xmm22, {rn-sae}
Expand Down

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