Skip to content

Commit

Permalink
KiwiSDR 2 support
Browse files Browse the repository at this point in the history
  • Loading branch information
@jks-prv
jks-prv committed Aug 22, 2023
1 parent 74b8cb8 commit 395e232
Show file tree
Hide file tree
Showing 25 changed files with 436 additions and 183 deletions.
Binary file modified KiwiSDR.rx14.wf0.bit
View file
Binary file not shown.
Binary file modified KiwiSDR.rx3.wf3.bit
View file
Binary file not shown.
Binary file modified KiwiSDR.rx4.wf4.bit
View file
Binary file not shown.
Binary file modified KiwiSDR.rx8.wf2.bit
View file
Binary file not shown.
10 changes: 6 additions & 4 deletions extensions/sig_gen/sig_gen.cpp
View file
Original file line number Diff line number Diff line change
Expand Up @@ -25,9 +25,10 @@ typedef struct {
int rx_chan;
#define GEN_RF_TONE 0x01
#define GEN_AF_NOISE 0x02
#define GEN_CICF_SW 0x04
#define GEN_CICF_HW 0x08
#define GEN_CICF_FW 0x10
#define GEN_SELF_TEST 0x04
#define GEN_CICF_SW 0x08
#define GEN_CICF_HW 0x10
#define GEN_CICF_FW 0x20
int run;
int attn;

Expand Down Expand Up @@ -148,9 +149,10 @@ bool gen_msgs(char *msg, int rx_chan)

n = sscanf(msg, "SET run=%d", &e->run);
if (n == 1) {
printf("sig_gen run=%d%s%s%s%s%s CICF=%d\n", e->run,
printf("sig_gen run=0x%x%s%s%s%s%s%s CICF=%d\n", e->run,
(e->run & GEN_RF_TONE)? " RF_TONE" : "",
(e->run & GEN_AF_NOISE)? " AF_NOISE" : "",
(e->run & GEN_SELF_TEST)? " SELF_TEST" : "",
(e->run & GEN_CICF_SW)? " CICF_SW" : "",
(e->run & GEN_CICF_HW)? " CICF_HW" : "",
(e->run & GEN_CICF_FW)? " CICF_FW" : "",
Expand Down
58 changes: 38 additions & 20 deletions kiwi.config
View file
Original file line number Diff line number Diff line change
Expand Up @@ -19,6 +19,7 @@

#if RX_CFG
DEFh USE_SDR 1
DEFh USE_24K_WIDE 0
#else
DEFh USE_SDR 0
#endif
Expand Down Expand Up @@ -104,8 +105,13 @@

DEFp CICF_DECIM_BY_2 2
#else
#if USE_24K_WIDE
DEFp RX1_WIDE_DECIM 463
DEFp RX2_WIDE_DECIM 6 // 463*6 = 2778, 66.6666M/2778 = 23998.056 Hz (-1.944)
#else
DEFp RX1_WIDE_DECIM 823
DEFp RX2_WIDE_DECIM 4 // 823*4 = 3292, 66.6666M/3292 = 20251.094 Hz (+1.094)
#endif

// half as much error as below, but don't want to change status quo
//DEFp RX1_STD_DECIM 926
Expand All @@ -117,10 +123,15 @@
DEFp CICF_DECIM_BY_2 1
#endif

#if USE_24K_WIDE
DEFp MAX_SND_RATE 24000
DEFp SND_RATE_3CH 24000
#else
DEFp MAX_SND_RATE 20250
DEFp SND_RATE_3CH 20250
#endif
DEFp MIN_SND_RATE 12000

DEFp SND_RATE_3CH 20250
DEFp SND_RATE_4CH 12000
DEFp SND_RATE_8CH 12000
DEFp SND_RATE_14CH 12000
Expand All @@ -136,7 +147,11 @@
DEFp RXBUF_SIZE_14CH 32768 // given 32k x 16b audio buffer in receiver.v

// for SPIBUF_W = 2048, RX_CHANS = 3, => nrx_samps = 226
// 1/(20250/nrx_samps) = interrupt every 11.2 ms / 90 Hz
// 1/(24000/nrx_samps) = interrupt every 9.4 ms / 118 Hz
// for RXBUF_SIZE_3CH = 16384 => nrx_bufs = 8

// for SPIBUF_W = 2048, RX_CHANS = 3, => nrx_samps = 226
// 1/(20250/nrx_samps) = interrupt every 11.2 ms / 106 Hz
// for RXBUF_SIZE_3CH = 16384 => nrx_bufs = 8

// for SPIBUF_W = 2048, RX_CHANS = 4, => nrx_samps = 170
Expand Down Expand Up @@ -375,25 +390,28 @@
DEFb STAT_OVFL 0x8000

// SET_CTRL
DEFb CTRL_0001 0x0001
DEFb CTRL_0002 0x0002
DEFb CTRL_0004 0x0004
DEFb CTRL_0008 0x0008
DEFb CTRL_0010 0x0010
DEFb CTRL_0020 0x0020
DEFb CTRL_0040 0x0040
//DEFb CTRL_0080 0x0080

#if USE_SDR
DEFb CTRL_USE_GEN 0x0400
DEFb CTRL_GEN_FIR 0x0080
#endif
DEFp CTRL_SER_NONE 0x0000
DEFp CTRL_SER_DNA 0x0001
DEFp CTRL_SER_DA 0x0002
DEFp CTRL_SER_GS 0x0003
DEFp CTRL_SER_MASK 0x0003
DEFb CTRL_SER_LE_CSN 0x0004
DEFb CTRL_SER_CLK 0x0008
DEFb CTRL_SER_DATA 0x0010

DEFb CTRL_STEN 0x0020

DEFb CTRL_DEBUG1 0x0040
DEFb CTRL_DEBUG2 0x0080

DEFb CTRL_OSC_EN 0x0100
DEFb CTRL_EEPROM_WP 0x0200
DEFb CTRL_UNUSED_OUT CTRL_EEPROM_WP
DEFb CTRL_EEPROM_WP 0x0200
DEFb CTRL_USE_GEN 0x0400
DEFb CTRL_CMD_READY 0x0800
DEFb CTRL_SND_INTR 0x1000
DEFb CTRL_DNA_READ 0x2000
DEFb CTRL_DNA_SHIFT 0x4000
DEFb CTRL_DNA_CLK 0x8000
DEFb CTRL_2000 0x2000
DEFb CTRL_4000 0x4000
DEFb CTRL_8000 0x8000

DEFb CTRL_UNUSED_OUT CTRL_EEPROM_WP
DEFb CTRL_GEN_FIR CTRL_DEBUG2 // temp: FIR debug
6 changes: 6 additions & 0 deletions main.cpp
View file
Original file line number Diff line number Diff line change
Expand Up @@ -445,6 +445,11 @@ int main(int argc, char *argv[])
ctrl_clr_set(0, ctrl);

// read device DNA
#define CTRL_DNA_CLK CTRL_SER_CLK
#define CTRL_DNA_READ CTRL_SER_LE_CSN
#define CTRL_DNA_SHIFT CTRL_SER_DATA

ctrl_set_ser_dev(CTRL_SER_DNA);
ctrl_clr_set(CTRL_DNA_CLK | CTRL_DNA_SHIFT, CTRL_DNA_READ);
ctrl_positive_pulse(CTRL_DNA_CLK);
ctrl_clr_set(CTRL_DNA_CLK | CTRL_DNA_READ, CTRL_DNA_SHIFT);
Expand All @@ -455,6 +460,7 @@ int main(int argc, char *argv[])
ctrl_positive_pulse(CTRL_DNA_CLK);
}
ctrl_clr_set(CTRL_DNA_CLK | CTRL_DNA_READ | CTRL_DNA_SHIFT, 0);
ctrl_clr_ser_dev();
printf("device DNA %08x|%08x\n", PRINTF_U64_ARG(net.dna));
}

Expand Down
40 changes: 18 additions & 22 deletions rx/rx_sound.cpp
View file
Original file line number Diff line number Diff line change
Expand Up @@ -21,6 +21,7 @@ Boston, MA 02110-1301, USA.
#include "options.h"
#include "config.h"
#include "kiwi.h"
#include "printf.h"
#include "rx.h"
#include "rx_util.h"
#include "clk.h"
Expand Down Expand Up @@ -237,7 +238,7 @@ void c2s_sound(void *param)
//static u4_t ncnt[MAX_RX_CHANS];
const char *s;

double freq=-1, _freq, gen=-1, _gen, locut=0, _locut, hicut=0, _hicut, mix;
double freq=-1, _freq, gen=-1, locut=0, _locut, hicut=0, _hicut;
int mode=-1, _mode, genattn=0, _genattn, mute=0, test=0, deemp=0, deemp_nfm=0;
u4_t mparam=0;
double z1 = 0;
Expand Down Expand Up @@ -604,7 +605,7 @@ void c2s_sound(void *param)
if (n < 0 || n >= N_SND_WINF) n = 0;
snd->window_func = n;
m_PassbandFIR[rx_chan].SetupWindowFunction(snd->window_func);
cprintf(conn, "SND window_func=%d\n", snd->window_func);
//cprintf(conn, "SND window_func=%d\n", snd->window_func);
did_cmd = true;
}
break;
Expand Down Expand Up @@ -637,7 +638,7 @@ void c2s_sound(void *param)
case CMD_REINIT:
if (strcmp(cmd, "SET reinit") == 0) {
did_cmd = true;
cprintf(conn, "SND restart\n");
//cprintf(conn, "SND restart\n");
if (cmd_recv & CMD_AGC)
m_Agc[rx_chan].SetParameters(agc, hang, thresh, manGain, slope, decay, frate);
memset(&snd->adpcm_snd, 0, sizeof(ima_adpcm_state_t));
Expand All @@ -654,23 +655,19 @@ void c2s_sound(void *param)
break;

case CMD_GEN_FREQ:
n = sscanf(cmd, "SET gen=%lf mix=%lf", &_gen, &mix);
if (n == 2) {
n = sscanf(cmd, "SET gen=%lf", &gen);
if (n == 1) {
did_cmd = true;
//printf("MIX %f %d\n", mix, (int) mix);
if (gen != _gen) {
gen = _gen;
f_phase = gen * kHz / conn->adc_clock_corrected;
i_phase = (u64_t) round(f_phase * pow(2,48));
//printf("sound %d: %s %.3f kHz phase %.3f 0x%012llx\n", rx_chan, gen? "GEN_ON":"GEN_OFF", gen, f_phase, i_phase);
if (do_sdr) {
spi_set3(CmdSetGenFreq, rx_chan, (u4_t) ((i_phase >> 16) & 0xffffffff), (u2_t) (i_phase & 0xffff));
ctrl_clr_set(CTRL_USE_GEN, gen? CTRL_USE_GEN:0);
}
if (rx_chan == 0) g_genfreq = gen * kHz / ui_srate;
u4_t self_test = (gen < 0)? CTRL_STEN : 0;
gen = fabs(gen);
f_phase = gen * kHz / conn->adc_clock_corrected;
i_phase = (u64_t) round(f_phase * pow(2,48));
//cprintf(conn, "%s %.3f kHz phase %.3f 0x%012llx self_test=%d\n", gen? "GEN_ON":"GEN_OFF", gen, f_phase, i_phase, self_test? 1:0);
if (do_sdr) {
spi_set3(CmdSetGenFreq, rx_chan, (u4_t) ((i_phase >> 16) & 0xffffffff), (u2_t) (i_phase & 0xffff));
ctrl_clr_set(CTRL_USE_GEN | CTRL_STEN, gen? (CTRL_USE_GEN | self_test):0);
}
if (rx_chan == 0) g_mixfreq = mix;
//conn->ext_api = true;
if (rx_chan == 0) g_genfreq = gen * kHz / ui_srate;
}
break;

Expand All @@ -681,10 +678,9 @@ void c2s_sound(void *param)
if (1 || genattn != _genattn) {
genattn = _genattn;
if (do_sdr) spi_set(CmdSetGenAttn, 0, (u4_t) genattn);
//printf("===> CmdSetGenAttn %d 0x%x\n", genattn, genattn);
//cprintf(conn, "GEN_ATTN %d 0x%x\n", genattn, genattn);
if (rx_chan == 0) g_genampl = genattn / (float)((1<<17)-1);
}
//conn->ext_api = true;
}
break;

Expand All @@ -699,7 +695,7 @@ void c2s_sound(void *param)
slope = _slope;
decay = _decay;
manGain = _manGain;
//printf("AGC %d hang=%d thresh=%d slope=%d decay=%d manGain=%d srate=%.1f\n",
//cprintf(conn, "AGC %d hang=%d thresh=%d slope=%d decay=%d manGain=%d srate=%.1f\n",
// agc, hang, thresh, slope, decay, manGain, frate);
m_Agc[rx_chan].SetParameters(agc, hang, thresh, manGain, slope, decay, frate);
cmd_recv |= CMD_AGC;
Expand Down Expand Up @@ -884,7 +880,7 @@ void c2s_sound(void *param)
n = sscanf(cmd, "SET test=%d", &test);
if (n == 1) {
did_cmd = true;
printf("test %d\n", test);
cprintf(conn, "test %d\n", test);
test_flag = test;
}
break;
Expand Down
34 changes: 33 additions & 1 deletion support/misc.cpp
View file
Original file line number Diff line number Diff line change
Expand Up @@ -133,16 +133,48 @@ u2_t ctrl_get()
return rv;
}

static void stat_dump(const char *id)
{
stat_reg_t stat = stat_get();
printf("%s stat_get=0x%04x %4s|%3s|%5s|%s\n", id, stat.word,
(stat.word & 0x80)? "READ" : "",
(stat.word & 0x40)? "CLK" : "",
(stat.word & 0x20)? "SHIFT" : "",
(stat.word & 0x10)? "D1" : "D0"
);
}

// NB: the eCPU maintains a latched shadow value of SET_CTRL[]
// This means if a bit is given in the set parameter it persists until given in the clr parameter.
// But it doesn't have to be given in subsequent set parameters to persist due to the latching.
void ctrl_clr_set(u2_t clr, u2_t set)
{
spi_set_noduplex(CmdCtrlClrSet, clr, set);
//printf("ctrl_clr_set(0x%04x, 0x%04x) ctrl_get=0x%04x\n", clr, set, ctrl_get());
//printf("ctrl_clr_set(0x%04x, 0x%04x) ctrl_get=0x%04x ", clr, set, ctrl_get());
//stat_dump("SET");
}

void ctrl_positive_pulse(u2_t bits)
{
//printf("ctrl_positive_pulse 0x%x\n", bits);
spi_set_noduplex(CmdCtrlClrSet, bits, bits);
//printf("ctrl_positive_pulse(0x%04x, 0x%04x) ctrl_get=0x%04x ", bits, bits, ctrl_get());
//stat_dump("RISE");
spi_set_noduplex(CmdCtrlClrSet, bits, 0);
//printf("ctrl_positive_pulse(0x%04x, 0x%04x) ctrl_get=0x%04x ", bits, 0, ctrl_get());
//stat_dump("FALL");
}

void ctrl_set_ser_dev(u2_t ser_dev)
{
//printf("ctrl_set_ser_dev 0x%x\n", ser_dev);
ctrl_clr_set(CTRL_SER_MASK, ser_dev);
}

void ctrl_clr_ser_dev()
{
//printf("ctrl_set_ser_dev\n");
ctrl_clr_set(CTRL_SER_MASK, CTRL_SER_NONE);
}

stat_reg_t stat_get()
Expand Down
2 changes: 2 additions & 0 deletions support/misc.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -39,6 +39,8 @@ void release_misc_mosi();
u2_t ctrl_get();
void ctrl_clr_set(u2_t clr, u2_t set);
void ctrl_positive_pulse(u2_t bits);
void ctrl_set_ser_dev(u2_t ser_dev);
void ctrl_clr_ser_dev();

typedef union {
u2_t word;
Expand Down
44 changes: 34 additions & 10 deletions verilog/KiwiSDR.xc7a35t.xdc
View file
Original file line number Diff line number Diff line change
@@ -1,9 +1,19 @@
set_property IOSTANDARD LVCMOS33 [get_ports ADC_CLKIN]
set_property IOSTANDARD LVCMOS33 [get_ports ADC_CLKEN]
set_property IOSTANDARD LVCMOS33 [get_ports BBB_SCLK]
set_property IOSTANDARD LVCMOS33 [get_ports ADC_STENL]
set_property IOSTANDARD LVCMOS33 [get_ports ADC_STSIG]
set_property IOSTANDARD LVCMOS33 [get_ports DA_DALE]
set_property IOSTANDARD LVCMOS33 [get_ports DA_DACLK]
set_property IOSTANDARD LVCMOS33 [get_ports DA_DADAT]
set_property IOSTANDARD LVCMOS33 [get_ports GPS_TCXO]
set_property IOSTANDARD LVCMOS33 [get_ports IF_SGN]
set_property IOSTANDARD LVCMOS33 [get_ports IF_MAG]
set_property IOSTANDARD LVCMOS33 [get_ports GPS_ISGN]
set_property IOSTANDARD LVCMOS33 [get_ports GPS_IMAG]
set_property IOSTANDARD LVCMOS33 [get_ports GPS_QSGN]
set_property IOSTANDARD LVCMOS33 [get_ports GPS_QMAG]
set_property IOSTANDARD LVCMOS33 [get_ports GPS_GSCS]
set_property IOSTANDARD LVCMOS33 [get_ports GPS_GSCLK]
set_property IOSTANDARD LVCMOS33 [get_ports GPS_GSDAT]
set_property IOSTANDARD LVCMOS33 [get_ports BBB_SCLK]
set_property IOSTANDARD LVCMOS33 [get_ports {BBB_CS_N[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports {BBB_CS_N[0]}]
set_property IOSTANDARD LVCMOS33 [get_ports BBB_MISO]
Expand Down Expand Up @@ -43,10 +53,20 @@ set_property IOSTANDARD LVCMOS33 [get_ports EWP]

set_property PACKAGE_PIN E12 [get_ports ADC_CLKIN]
set_property PACKAGE_PIN A8 [get_ports ADC_CLKEN]
set_property PACKAGE_PIN D13 [get_ports BBB_SCLK]
set_property PACKAGE_PIN A2 [get_ports ADC_STENL]
set_property PACKAGE_PIN A3 [get_ports ADC_STSIG]
set_property PACKAGE_PIN A7 [get_ports DA_DALE]
set_property PACKAGE_PIN A5 [get_ports DA_DACLK]
set_property PACKAGE_PIN A4 [get_ports DA_DADAT]
set_property PACKAGE_PIN D4 [get_ports GPS_TCXO]
set_property PACKAGE_PIN B1 [get_ports IF_SGN]
set_property PACKAGE_PIN B2 [get_ports IF_MAG]
set_property PACKAGE_PIN B1 [get_ports GPS_ISGN]
set_property PACKAGE_PIN B2 [get_ports GPS_IMAG]
set_property PACKAGE_PIN E1 [get_ports GPS_QSGN]
set_property PACKAGE_PIN D1 [get_ports GPS_QMAG]
set_property PACKAGE_PIN C1 [get_ports GPS_GSCS]
set_property PACKAGE_PIN G2 [get_ports GPS_GSCLK]
set_property PACKAGE_PIN G1 [get_ports GPS_GSDAT]
set_property PACKAGE_PIN D13 [get_ports BBB_SCLK]
set_property PACKAGE_PIN P16 [get_ports {BBB_CS_N[1]}]
set_property PACKAGE_PIN N16 [get_ports {BBB_CS_N[0]}]
set_property PACKAGE_PIN M15 [get_ports BBB_MISO]
Expand Down Expand Up @@ -107,10 +127,14 @@ set_input_delay -clock [get_clocks ADC_CLKIN] -min -add_delay 1.400 [get_ports A
set_input_delay -clock [get_clocks ADC_CLKIN] -max -add_delay 5.400 [get_ports ADC_OVFL]
set_input_delay -clock [get_clocks BBB_SCLK] -min -add_delay 6.846 [get_ports BBB_MOSI]
set_input_delay -clock [get_clocks BBB_SCLK] -max -add_delay 17.263 [get_ports BBB_MOSI]
set_input_delay -clock [get_clocks GPS_TCXO] -min -add_delay 10.000 [get_ports IF_SGN]
set_input_delay -clock [get_clocks GPS_TCXO] -max -add_delay 54.095 [get_ports IF_SGN] ; # gives Tsetup=7ns
set_input_delay -clock [get_clocks GPS_TCXO] -min -add_delay 10.000 [get_ports IF_MAG]
set_input_delay -clock [get_clocks GPS_TCXO] -max -add_delay 54.095 [get_ports IF_MAG]
set_input_delay -clock [get_clocks GPS_TCXO] -min -add_delay 10.000 [get_ports GPS_ISGN]
set_input_delay -clock [get_clocks GPS_TCXO] -max -add_delay 54.095 [get_ports GPS_ISGN] ; # gives Tsetup=7ns
set_input_delay -clock [get_clocks GPS_TCXO] -min -add_delay 10.000 [get_ports GPS_IMAG]
set_input_delay -clock [get_clocks GPS_TCXO] -max -add_delay 54.095 [get_ports GPS_IMAG]
set_input_delay -clock [get_clocks GPS_TCXO] -min -add_delay 10.000 [get_ports GPS_QSGN]
set_input_delay -clock [get_clocks GPS_TCXO] -max -add_delay 54.095 [get_ports GPS_QSGN]
set_input_delay -clock [get_clocks GPS_TCXO] -min -add_delay 10.000 [get_ports GPS_QMAG]
set_input_delay -clock [get_clocks GPS_TCXO] -max -add_delay 54.095 [get_ports GPS_QMAG]

# FIXME: is MISO timing marginal?
set_output_delay -clock [get_clocks BBB_SCLK] -max -add_delay 2.290 [get_ports BBB_MISO]
Expand Down
Loading

0 comments on commit 395e232

Please sign in to comment.