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IPV4/IPV6 TVBOX 电视直播点播源收集

A simple C++11 Thread Pool implementation

log4cplus is a simple to use C++ logging API providing thread-safe, flexible, and arbitrarily granular control over log management and configuration. It is modelled after the Java log4j API.

代码在这个库里 Code is here

The VD100 development board is based on the Xilinx Versal AI Edge series chip xcve2302 and is designed with a core board and a bottom board.

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FPGA based 30ps RMS TDCs

PID controller

Balancing Robot Senior Project

An FPGA-based lightweight CAN bus controller. 基于FPGA的轻量级CAN总线控制器。

This is the repository for a verilog implementation of a lzrw1 compression core

A shadowsocks client for Android

Sublime Text 2/3 Auto backups plugin

one for all free music in china (origin edition)

Unofficial mirror of LZO

Generic FIFO implementation with optional FWFT

one for all free music in china (Windows, Mac, Linux desktop)

Open source FPGA-based NIC and platform for in-network compute

Open source FPGA-based NIC and platform for in-network compute

SPI Master for FPGA - VHDL and Verilog

SPI Slave for FPGA in Verilog and VHDL

A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog

Verilog I2C interface for FPGA implementation

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