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pl011: initial unit testing for PL011
Initial unit tests have been introduced to cover the following functions: -mod_pl011_putch -mod_pl011_io_putch -mod_pl011_init_ctx -mod_pl011_init -mod_pl011_io_open -mod_pl011_getch -mod_pl011_flush Signed-off-by: Katherine Vincent <[email protected]> Change-Id: I06a4f98e73e240a8135c69f743cf207692f53c08
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# | ||
# Arm SCP/MCP Software | ||
# Copyright (c) 2023, Arm Limited and Contributors. All rights reserved. | ||
# | ||
# SPDX-License-Identifier: BSD-3-Clause | ||
# | ||
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set(TEST_SRC mod_pl011) | ||
set(TEST_FILE mod_pl011) | ||
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set(UNIT_TEST_TARGET mod_${TEST_MODULE}_unit_test) | ||
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set(MODULE_SRC ${MODULE_ROOT}/${TEST_MODULE}/src) | ||
set(MODULE_INC ${MODULE_ROOT}/${TEST_MODULE}/include) | ||
list(APPEND OTHER_MODULE_INC ${MODULE_ROOT}/system_power/include) | ||
list(APPEND OTHER_MODULE_INC ${MODULE_ROOT}/power_domain/include) | ||
list(APPEND OTHER_MODULE_INC ${MODULE_ROOT}/clock/include) | ||
set(MODULE_UT_SRC ${CMAKE_CURRENT_LIST_DIR}) | ||
set(MODULE_UT_INC ${CMAKE_CURRENT_LIST_DIR}) | ||
set(MODULE_UT_MOCK_SRC ${CMAKE_CURRENT_LIST_DIR}/mocks) | ||
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list(APPEND MOCK_REPLACEMENTS fwk_module) | ||
list(APPEND MOCK_REPLACEMENTS fwk_notification) | ||
list(APPEND MOCK_REPLACEMENTS fwk_id) | ||
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include(${SCP_ROOT}/unit_test/module_common.cmake) |
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/* | ||
* Arm SCP/MCP Software | ||
* Copyright (c) 2023, Arm Limited and Contributors. All rights reserved. | ||
* | ||
* SPDX-License-Identifier: BSD-3-Clause | ||
*/ | ||
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static struct pl011_reg mod_reg; | ||
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#include <mod_pl011.h> | ||
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#include <fwk_element.h> | ||
#include <fwk_id.h> | ||
#include <fwk_macros.h> | ||
#include <fwk_module.h> | ||
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enum mhu3_fake_device_idx { | ||
PL011_FAKE_ELEMENT_IDX_0, | ||
PL011_FAKE_ELEMENT_IDX_COUNT, | ||
}; | ||
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struct fwk_module_config config_pl011_ut = { | ||
.elements = FWK_MODULE_STATIC_ELEMENTS({ | ||
[0] = { | ||
.name = "UART OUTPUT", | ||
.data = | ||
&(struct mod_pl011_element_cfg){ | ||
.reg_base = (uintptr_t)&mod_reg, | ||
.baud_rate_bps = 115200, | ||
.clock_rate_hz = 24 * FWK_MHZ, | ||
}, | ||
}, | ||
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[1] = { 0 }, | ||
}), | ||
}; |
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/* | ||
* Arm SCP/MCP Software | ||
* Copyright (c) 2023, Arm Limited and Contributors. All rights reserved. | ||
* | ||
* SPDX-License-Identifier: BSD-3-Clause | ||
*/ | ||
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#ifndef TEST_FWK_MODULE_MODULE_IDX_H | ||
#define TEST_FWK_MODULE_MODULE_IDX_H | ||
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#include <fwk_id.h> | ||
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enum fwk_module_idx { | ||
FWK_MODULE_IDX_PL011, | ||
FWK_MODULE_IDX_COUNT, | ||
}; | ||
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static const fwk_id_t fwk_module_id_pl011 = | ||
FWK_ID_MODULE_INIT(FWK_MODULE_IDX_PL011); | ||
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#endif /* TEST_FWK_MODULE_MODULE_IDX_H */ |
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{ | ||
"DisableFormat": true, | ||
"SortIncludes": false, | ||
} |
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/* | ||
* Arm SCP/MCP Software | ||
* Copyright (c) 2023, Arm Limited and Contributors. All rights reserved. | ||
* | ||
* SPDX-License-Identifier: BSD-3-Clause | ||
*/ | ||
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#include "scp_unity.h" | ||
#include "unity.h" | ||
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#include <Mockfwk_id.h> | ||
#include <Mockfwk_module.h> | ||
#include <pl011.h> | ||
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#include <mod_pl011.h> | ||
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#include <fwk_element.h> | ||
#include <fwk_macros.h> | ||
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#include UNIT_TEST_SRC | ||
#include "config_pl011.h" | ||
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struct fwk_io_stream stream; | ||
struct mod_pl011_element_cfg *cfg_ut; | ||
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void setUp(void) | ||
{ | ||
memset(&pl011_ctx, 0, sizeof(pl011_ctx)); | ||
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cfg_ut = | ||
(struct mod_pl011_element_cfg *)config_pl011_ut.elements.table[0].data; | ||
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pl011_ctx.elements = fwk_mm_alloc(1, sizeof(pl011_ctx.elements[0])); | ||
pl011_ctx.elements[0] = (struct mod_pl011_element_ctx){ | ||
.powered = true, /* Assume the device is always powered */ | ||
.clocked = true, /* Assume the device is always clocked */ | ||
.open = false, | ||
}; | ||
} | ||
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void tearDown(void) | ||
{ | ||
} | ||
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void test_mod_pl011_putch_true(void) | ||
{ | ||
bool status; | ||
char ch = 64; | ||
fwk_id_t id; | ||
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fwk_module_get_data_ExpectAnyArgsAndReturn(cfg_ut); | ||
fwk_id_get_element_idx_ExpectAnyArgsAndReturn(0); | ||
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status = mod_pl011_putch(id, ch); | ||
TEST_ASSERT_EQUAL(status, true); | ||
TEST_ASSERT_EQUAL(mod_reg.DR, ch); | ||
} | ||
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void test_mod_pl011_io_putch_success(void) | ||
{ | ||
int status; | ||
char ch = 64; | ||
struct fwk_io_stream stream; | ||
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fwk_id_get_element_idx_ExpectAnyArgsAndReturn(0); | ||
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pl011_ctx.elements[0].open = true; | ||
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fwk_module_get_data_ExpectAnyArgsAndReturn(cfg_ut); | ||
fwk_id_get_element_idx_ExpectAnyArgsAndReturn(0); | ||
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status = mod_pl011_io_putch(&stream, ch); | ||
TEST_ASSERT_EQUAL(status, FWK_SUCCESS); | ||
TEST_ASSERT_EQUAL(mod_reg.DR, ch); | ||
} | ||
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void test_mod_pl011_io_putch_fail_powered(void) | ||
{ | ||
int status; | ||
char ch = 0; | ||
struct fwk_io_stream stream; | ||
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fwk_id_get_element_idx_ExpectAnyArgsAndReturn(0); | ||
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pl011_ctx.elements[0].open = true; | ||
pl011_ctx.elements[0].powered = false; | ||
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fwk_module_get_data_ExpectAnyArgsAndReturn(cfg_ut); | ||
fwk_id_get_element_idx_ExpectAnyArgsAndReturn(0); | ||
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status = mod_pl011_io_putch(&stream, ch); | ||
TEST_ASSERT_EQUAL(status, FWK_E_PWRSTATE); | ||
} | ||
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void test_mod_pl011_io_putch_fail_clocked(void) | ||
{ | ||
int status; | ||
char ch = 0; | ||
struct fwk_io_stream stream; | ||
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fwk_id_get_element_idx_ExpectAnyArgsAndReturn(0); | ||
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pl011_ctx.elements[0].open = true; | ||
pl011_ctx.elements[0].clocked = false; | ||
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fwk_module_get_data_ExpectAnyArgsAndReturn(cfg_ut); | ||
fwk_id_get_element_idx_ExpectAnyArgsAndReturn(0); | ||
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status = mod_pl011_io_putch(&stream, ch); | ||
TEST_ASSERT_EQUAL(status, FWK_E_PWRSTATE); | ||
} | ||
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void test_mod_pl011_init_ctx(void) | ||
{ | ||
/* Clear module context to ensure it is properly initialized */ | ||
memset(&pl011_ctx, 0, sizeof(pl011_ctx)); | ||
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fwk_module_get_element_count_ExpectAnyArgsAndReturn(1); | ||
fwk_module_get_data_ExpectAnyArgsAndReturn(cfg_ut); | ||
fwk_id_is_equal_ExpectAnyArgsAndReturn(true); | ||
fwk_id_is_equal_ExpectAnyArgsAndReturn(true); | ||
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mod_pl011_init_ctx(); | ||
TEST_ASSERT_EQUAL(pl011_ctx.initialized, true); | ||
TEST_ASSERT_EQUAL(pl011_ctx.elements[0].powered, true); | ||
TEST_ASSERT_EQUAL(pl011_ctx.elements[0].clocked, true); | ||
TEST_ASSERT_EQUAL(pl011_ctx.elements[0].open, false); | ||
} | ||
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void test_mod_pl011_init_initialised(void) | ||
{ | ||
int status; | ||
fwk_id_t module_id; | ||
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pl011_ctx.initialized = true; | ||
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status = mod_pl011_init(module_id, 1, NULL); | ||
TEST_ASSERT_EQUAL(status, FWK_SUCCESS); | ||
} | ||
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void test_mod_pl011_init(void) | ||
{ | ||
int status; | ||
fwk_id_t module_id; | ||
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/* Clear module context to ensure it is properly initialized */ | ||
memset(&pl011_ctx, 0, sizeof(pl011_ctx)); | ||
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pl011_ctx.initialized = false; | ||
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/* Set up the mock calls for the context initialisation */ | ||
fwk_module_get_element_count_ExpectAnyArgsAndReturn(1); | ||
fwk_module_get_data_ExpectAnyArgsAndReturn(cfg_ut); | ||
fwk_id_is_equal_ExpectAnyArgsAndReturn(true); | ||
fwk_id_is_equal_ExpectAnyArgsAndReturn(true); | ||
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status = mod_pl011_init(module_id, 1, NULL); | ||
TEST_ASSERT_EQUAL(status, FWK_SUCCESS); | ||
TEST_ASSERT_EQUAL(pl011_ctx.initialized, true); | ||
TEST_ASSERT_EQUAL(pl011_ctx.elements[0].powered, true); | ||
TEST_ASSERT_EQUAL(pl011_ctx.elements[0].clocked, true); | ||
TEST_ASSERT_EQUAL(pl011_ctx.elements[0].open, false); | ||
} | ||
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void test_mod_pl011_io_open_support(void) | ||
{ | ||
int status; | ||
struct fwk_io_stream stream; | ||
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fwk_id_is_type_ExpectAnyArgsAndReturn(false); | ||
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status = mod_pl011_io_open(&stream); | ||
TEST_ASSERT_EQUAL(status, FWK_E_SUPPORT); | ||
} | ||
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void test_mod_pl011_io_open_busy(void) | ||
{ | ||
int status; | ||
struct fwk_io_stream stream; | ||
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fwk_id_is_type_ExpectAnyArgsAndReturn(true); | ||
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pl011_ctx.initialized = true; | ||
pl011_ctx.elements[0].open = true; | ||
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fwk_id_get_element_idx_ExpectAnyArgsAndReturn(0); | ||
status = mod_pl011_io_open(&stream); | ||
TEST_ASSERT_EQUAL(status, FWK_E_BUSY); | ||
} | ||
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void test_mod_pl011_io_open_success(void) | ||
{ | ||
int status; | ||
struct fwk_io_stream stream; | ||
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pl011_ctx.initialized = true; | ||
pl011_ctx.elements[0].clocked = true; | ||
pl011_ctx.elements[0].powered = true; | ||
pl011_ctx.elements[0].open = false; | ||
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fwk_id_is_type_ExpectAnyArgsAndReturn(true); | ||
fwk_id_get_element_idx_ExpectAnyArgsAndReturn(0); | ||
fwk_module_get_data_ExpectAnyArgsAndReturn(cfg_ut); | ||
fwk_id_get_element_idx_ExpectAnyArgsAndReturn(0); | ||
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status = mod_pl011_io_open(&stream); | ||
TEST_ASSERT_EQUAL(status, FWK_SUCCESS); | ||
TEST_ASSERT_EQUAL(pl011_ctx.elements[0].open, true); | ||
TEST_ASSERT_EQUAL(mod_reg.ECR, PL011_ECR_CLR); | ||
TEST_ASSERT_EQUAL(mod_reg.LCR_H, PL011_LCR_H_WLEN_8BITS | PL011_LCR_H_FEN); | ||
TEST_ASSERT_EQUAL( | ||
mod_reg.CR, PL011_CR_UARTEN | PL011_CR_RXE | PL011_CR_TXE); | ||
} | ||
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void test_mod_pl011_io_getch(void) | ||
{ | ||
bool status; | ||
char ch = 0; | ||
fwk_id_t id; | ||
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mod_reg.DR = 64; | ||
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fwk_module_get_data_ExpectAnyArgsAndReturn(cfg_ut); | ||
fwk_id_get_element_idx_ExpectAnyArgsAndReturn(0); | ||
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status = mod_pl011_getch(id, &ch); | ||
TEST_ASSERT_EQUAL(status, true); | ||
TEST_ASSERT_EQUAL(ch, 64); | ||
} | ||
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void test_mod_pl011_flush(void) | ||
{ | ||
fwk_id_t id; | ||
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fwk_module_get_data_ExpectAnyArgsAndReturn(cfg_ut); | ||
fwk_id_get_element_idx_ExpectAnyArgsAndReturn(0); | ||
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/* The PL011_FR_BUSY is zeroed so the flush should take place silently */ | ||
mod_pl011_flush(id); | ||
} | ||
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int pl011_test_main(void) | ||
{ | ||
UNITY_BEGIN(); | ||
RUN_TEST(test_mod_pl011_putch_true); | ||
RUN_TEST(test_mod_pl011_io_putch_success); | ||
RUN_TEST(test_mod_pl011_io_putch_fail_powered); | ||
RUN_TEST(test_mod_pl011_io_putch_fail_clocked); | ||
RUN_TEST(test_mod_pl011_io_open_busy); | ||
RUN_TEST(test_mod_pl011_init_ctx); | ||
RUN_TEST(test_mod_pl011_init_initialised); | ||
RUN_TEST(test_mod_pl011_init); | ||
RUN_TEST(test_mod_pl011_io_open_support); | ||
RUN_TEST(test_mod_pl011_io_open_success); | ||
RUN_TEST(test_mod_pl011_io_getch); | ||
RUN_TEST(test_mod_pl011_flush); | ||
return UNITY_END(); | ||
} | ||
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#if !defined(TEST_ON_TARGET) | ||
int main(void) | ||
{ | ||
return pl011_test_main(); | ||
} | ||
#endif |
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