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boards: shield: Add a shield for the NXP LCD-PAR-S035 LCD module
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NXP LCD-PAR-S035 LCD module will be used by FRDM-X evaluation
kits with a parallel LCD connector.

Signed-off-by: Mahesh Mahadevan <[email protected]>
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mmahadevan108 authored and nashif committed Jun 13, 2024
1 parent b219596 commit 3fbd689
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16 changes: 16 additions & 0 deletions boards/shields/lcd_par_s035/Kconfig.defconfig
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# Copyright 2024 NXP
# SPDX-License-Identifier: Apache-2.0

if SHIELD_LCD_PAR_S035
if LVGL

# Enable double buffering
config LV_Z_DOUBLE_VDB
default y

config LV_Z_BITS_PER_PIXEL
default 16

endif # LVGL

endif # SHIELD_LCD_PAR_S035
5 changes: 5 additions & 0 deletions boards/shields/lcd_par_s035/Kconfig.shield
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# Copyright 2024 NXP
# SPDX-License-Identifier: Apache-2.0

config SHIELD_LCD_PAR_S035
def_bool $(shields_list_contains,lcd_par_s035_8080)
40 changes: 40 additions & 0 deletions boards/shields/lcd_par_s035/doc/index.rst
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.. _lcd_par_s035:

NXP LCD_PAR_S035 TFT LCD Module
###############################

Overview
********

The LCD-PAR-S035 is a 3.5” 480x320 IPS TFT LCD module with wide viewing angle
and 5-point capacitive touch functionality. The LCD module can be controlled
through either SPI or parallel (8/16bit) 8080/6800.
More information about the shield can be found
at the `LCD-PAR-S035 product page`_.

Requirements
************

This shield can only be used with FRDM-X evaluation kits with a parallel LCD
connector or a PMOD connector. Currently only the parallel LCD connector is
enabled.

Programming
***********

Set ``-DSHIELD=lcd_par_s035_8080`` when you invoke ``west build``. For
example:

.. zephyr-app-commands::
:zephyr-app: samples/drivers/display
:board: frdm_mcxn947/mcxn947/cpu0
:shield: lcd_par_s035_8080
:goals: build

References
**********

.. target-notes::

.. _LCD-PAR-S035 product page:
https://www.nxp.com/design/design-center/development-boards-and-designs/general-purpose-mcus/3-5-480x320-ips-tft-lcd-module:LCD-PAR-S035
41 changes: 41 additions & 0 deletions boards/shields/lcd_par_s035/lcd_par_s035_8080.overlay
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/*
* Copyright 2024 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/

#include <zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>

/{
chosen {
zephyr,display = &st7796s;
};
};

&nxp_flexio_lcd {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
st7796s: st7796s@0 {
compatible = "sitronix,st7796s";
reg = <0>;
/* Baud rate on each pin is 1MHz */
mipi-max-frequency = <10000000>;
mipi-mode = <MIPI_DBI_MODE_8080_BUS_16_BIT>;
height = <320>;
width = <480>;
invert-mode = "1-dot";
frmctl1 = [80 10];
bpc = [1F 50 00 20];
dfc = [8A 07 3B];
pwr1 = [80 64];
pwr2 = <0x13>;
pwr3 = <0xA7>;
vcmpctl = <0x09>;
doca = [40 8A 00 00 29 19 A5 33];
pgc = [F0 06 0B 07 06 05 2E 33 47 3A 17 16 2E 31];
ngc = [F0 09 0D 09 08 23 2E 33 46 38 13 13 2C 32];
madctl = <0x28>;
color-invert;
};
};

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