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[X86] Remove erroneous callsite offsetting in SJLJ landing pads
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The callsite value is already stored indexed from 0 in
the _Unwind_Context struct. When accessed via the functions
_Unwind_GetIP and _Unwind_SetIP, the value is indexed from 1,
but those functions handle the offseting. When reading directly
from the struct here, we shouldn't subtract 1.

This matches the code generated by the ARM target, where SJLJ
exception handling is used by default on iOS.

This makes clang-built object files for 32 bit x86 mingw work when
linked with libgcc/libstdc++.

Differential Revision: https://reviews.llvm.org/D38251

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314276 91177308-0d34-0410-b5e6-96231b3b80d8
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mstorsjo committed Sep 27, 2017
1 parent 728eef5 commit 1c1a889
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Showing 2 changed files with 5 additions and 10 deletions.
8 changes: 2 additions & 6 deletions lib/Target/X86/X86ISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -26576,17 +26576,13 @@ X86TargetLowering::EmitSjLjDispatchBlock(MachineInstr &MI,
BuildMI(DispatchBB, DL, TII->get(X86::CMP32ri))
.addReg(IReg)
.addImm(LPadList.size());
BuildMI(DispatchBB, DL, TII->get(X86::JA_1)).addMBB(TrapBB);
BuildMI(DispatchBB, DL, TII->get(X86::JAE_1)).addMBB(TrapBB);

unsigned JReg = MRI->createVirtualRegister(&X86::GR32RegClass);
BuildMI(DispContBB, DL, TII->get(X86::SUB32ri), JReg)
.addReg(IReg)
.addImm(1);
BuildMI(DispContBB, DL,
TII->get(Subtarget.is64Bit() ? X86::JMP64m : X86::JMP32m))
.addReg(0)
.addImm(Subtarget.is64Bit() ? 8 : 4)
.addReg(JReg)
.addReg(IReg)
.addJumpTableIndex(MJTI)
.addReg(0);

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7 changes: 3 additions & 4 deletions test/CodeGen/X86/sjlj-eh.ll
Original file line number Diff line number Diff line change
Expand Up @@ -60,13 +60,12 @@ try.cont:
;
; CHECK: [[RESUME]]:
; CHECK: leal -64(%ebp), %esi
; assert(UFC.__callsite <= 1);
; assert(UFC.__callsite < 1);
; CHECK: movl -60(%ebp), %eax
; CHECK: cmpl $1, %eax
; CHECK: jbe [[CONT:LBB[0-9]+_[0-9]+]]
; CHECK: jb [[CONT:LBB[0-9]+_[0-9]+]]
; CHECK: ud2
; CHECK: [[CONT]]:
; *Handlers[--UFC.__callsite]
; CHECK: subl $1, %eax
; *Handlers[UFC.__callsite]
; CHECK: jmpl *LJTI

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